  "tdlgti",       { RA, SI }            ,{PPC64,  OPTO(2,TOLGT)},
  "tdllti",       { RA, SI }            ,{PPC64,  OPTO(2,TOLLT)},
  "tdeqi",        { RA, SI }            ,{PPC64,  OPTO(2,TOEQ)},
  "tdlgei",       { RA, SI }            ,{PPC64,  OPTO(2,TOLGE)},
  "tdlnli",       { RA, SI }            ,{PPC64,  OPTO(2,TOLNL)},
  "tdllei",       { RA, SI }            ,{PPC64,  OPTO(2,TOLLE)},
  "tdlngi",       { RA, SI }            ,{PPC64,  OPTO(2,TOLNG)},
  "tdgti",        { RA, SI }            ,{PPC64,  OPTO(2,TOGT)},
  "tdgei",        { RA, SI }            ,{PPC64,  OPTO(2,TOGE)},
  "tdnli",        { RA, SI }            ,{PPC64,  OPTO(2,TONL)},
  "tdlti",        { RA, SI }            ,{PPC64,  OPTO(2,TOLT)},
  "tdlei",        { RA, SI }            ,{PPC64,  OPTO(2,TOLE)},
  "tdngi",        { RA, SI }            ,{PPC64,  OPTO(2,TONG)},
  "tdnei",        { RA, SI }            ,{PPC64,  OPTO(2,TONE)},
  "tdi",          { TO, RA, SI }        ,{PPC64,  OP(2)},

  "twlgti",       { RA, SI }            ,{PPCCOM, OPTO(3,TOLGT)},
  "tlgti",        { RA, SI }            ,{PWRCOM, OPTO(3,TOLGT)},
  "twllti",       { RA, SI }            ,{PPCCOM, OPTO(3,TOLLT)},
  "tllti",        { RA, SI }            ,{PWRCOM, OPTO(3,TOLLT)},
  "tweqi",        { RA, SI }            ,{PPCCOM, OPTO(3,TOEQ)},
  "teqi",         { RA, SI }            ,{PWRCOM, OPTO(3,TOEQ)},
  "twlgei",       { RA, SI }            ,{PPCCOM, OPTO(3,TOLGE)},
  "tlgei",        { RA, SI }            ,{PWRCOM, OPTO(3,TOLGE)},
  "twlnli",       { RA, SI }            ,{PPCCOM, OPTO(3,TOLNL)},
  "tlnli",        { RA, SI }            ,{PWRCOM, OPTO(3,TOLNL)},
  "twllei",       { RA, SI }            ,{PPCCOM, OPTO(3,TOLLE)},
  "tllei",        { RA, SI }            ,{PWRCOM, OPTO(3,TOLLE)},
  "twlngi",       { RA, SI }            ,{PPCCOM, OPTO(3,TOLNG)},
  "tlngi",        { RA, SI }            ,{PWRCOM, OPTO(3,TOLNG)},
  "twgti",        { RA, SI }            ,{PPCCOM, OPTO(3,TOGT)},
  "tgti",         { RA, SI }            ,{PWRCOM, OPTO(3,TOGT)},
  "twgei",        { RA, SI }            ,{PPCCOM, OPTO(3,TOGE)},
  "tgei",         { RA, SI }            ,{PWRCOM, OPTO(3,TOGE)},
  "twnli",        { RA, SI }            ,{PPCCOM, OPTO(3,TONL)},
  "tnli",         { RA, SI }            ,{PWRCOM, OPTO(3,TONL)},
  "twlti",        { RA, SI }            ,{PPCCOM, OPTO(3,TOLT)},
  "tlti",         { RA, SI }            ,{PWRCOM, OPTO(3,TOLT)},
  "twlei",        { RA, SI }            ,{PPCCOM, OPTO(3,TOLE)},
  "tlei",         { RA, SI }            ,{PWRCOM, OPTO(3,TOLE)},
  "twngi",        { RA, SI }            ,{PPCCOM, OPTO(3,TONG)},
  "tngi",         { RA, SI }            ,{PWRCOM, OPTO(3,TONG)},
  "twnei",        { RA, SI }            ,{PPCCOM, OPTO(3,TONE)},
  "tnei",         { RA, SI }            ,{PWRCOM, OPTO(3,TONE)},
  "twi",          { TO, RA, SI }        ,{PPCCOM, OP(3)},
  "ti",           { TO, RA, SI }        ,{PWRCOM, OP(3)},

  "macchw",       { RT, RA, RB }        ,{PPC405, XO(4,172,0,0)},
  "macchw.",      { RT, RA, RB }        ,{PPC405, XO(4,172,0,1)},
  "macchwo",      { RT, RA, RB }        ,{PPC405, XO(4,172,1,0)},
  "macchwo.",     { RT, RA, RB }        ,{PPC405, XO(4,172,1,1)},
  "macchws",      { RT, RA, RB }        ,{PPC405, XO(4,236,0,0)},
  "macchws.",     { RT, RA, RB }        ,{PPC405, XO(4,236,0,1)},
  "macchwso",     { RT, RA, RB }        ,{PPC405, XO(4,236,1,0)},
  "macchwso.",    { RT, RA, RB }        ,{PPC405, XO(4,236,1,1)},
  "macchwsu",     { RT, RA, RB }        ,{PPC405, XO(4,204,0,0)},
  "macchwsu.",    { RT, RA, RB }        ,{PPC405, XO(4,204,0,1)},
  "macchwsuo",    { RT, RA, RB }        ,{PPC405, XO(4,204,1,0)},
  "macchwsuo.",   { RT, RA, RB }        ,{PPC405, XO(4,204,1,1)},
  "macchwu",      { RT, RA, RB }        ,{PPC405, XO(4,140,0,0)},
  "macchwu.",     { RT, RA, RB }        ,{PPC405, XO(4,140,0,1)},
  "macchwuo",     { RT, RA, RB }        ,{PPC405, XO(4,140,1,0)},
  "macchwuo.",    { RT, RA, RB }        ,{PPC405, XO(4,140,1,1)},
  "machhw",       { RT, RA, RB }        ,{PPC405, XO(4,44,0,0)},
  "machhw.",      { RT, RA, RB }        ,{PPC405, XO(4,44,0,1)},
  "machhwo",      { RT, RA, RB }        ,{PPC405, XO(4,44,1,0)},
  "machhwo.",     { RT, RA, RB }        ,{PPC405, XO(4,44,1,1)},
  "machhws",      { RT, RA, RB }        ,{PPC405, XO(4,108,0,0)},
  "machhws.",     { RT, RA, RB }        ,{PPC405, XO(4,108,0,1)},
  "machhwso",     { RT, RA, RB }        ,{PPC405, XO(4,108,1,0)},
  "machhwso.",    { RT, RA, RB }        ,{PPC405, XO(4,108,1,1)},
  "machhwsu",     { RT, RA, RB }        ,{PPC405, XO(4,76,0,0)},
  "machhwsu.",    { RT, RA, RB }        ,{PPC405, XO(4,76,0,1)},
  "machhwsuo",    { RT, RA, RB }        ,{PPC405, XO(4,76,1,0)},
  "machhwsuo.",   { RT, RA, RB }        ,{PPC405, XO(4,76,1,1)},
  "machhwu",      { RT, RA, RB }        ,{PPC405, XO(4,12,0,0)},
  "machhwu.",     { RT, RA, RB }        ,{PPC405, XO(4,12,0,1)},
  "machhwuo",     { RT, RA, RB }        ,{PPC405, XO(4,12,1,0)},
  "machhwuo.",    { RT, RA, RB }        ,{PPC405, XO(4,12,1,1)},
  "maclhw",       { RT, RA, RB }        ,{PPC405, XO(4,428,0,0)},
  "maclhw.",      { RT, RA, RB }        ,{PPC405, XO(4,428,0,1)},
  "maclhwo",      { RT, RA, RB }        ,{PPC405, XO(4,428,1,0)},
  "maclhwo.",     { RT, RA, RB }        ,{PPC405, XO(4,428,1,1)},
  "maclhws",      { RT, RA, RB }        ,{PPC405, XO(4,492,0,0)},
  "maclhws.",     { RT, RA, RB }        ,{PPC405, XO(4,492,0,1)},
  "maclhwso",     { RT, RA, RB }        ,{PPC405, XO(4,492,1,0)},
  "maclhwso.",    { RT, RA, RB }        ,{PPC405, XO(4,492,1,1)},
  "maclhwsu",     { RT, RA, RB }        ,{PPC405, XO(4,460,0,0)},
  "maclhwsu.",    { RT, RA, RB }        ,{PPC405, XO(4,460,0,1)},
  "maclhwsuo",    { RT, RA, RB }        ,{PPC405, XO(4,460,1,0)},
  "maclhwsuo.",   { RT, RA, RB }        ,{PPC405, XO(4,460,1,1)},
  "maclhwu",      { RT, RA, RB }        ,{PPC405, XO(4,396,0,0)},
  "maclhwu.",     { RT, RA, RB }        ,{PPC405, XO(4,396,0,1)},
  "maclhwuo",     { RT, RA, RB }        ,{PPC405, XO(4,396,1,0)},
  "maclhwuo.",    { RT, RA, RB }        ,{PPC405, XO(4,396,1,1)},
  "mulchw",       { RT, RA, RB }        ,{PPC405, XRC(4,168,0)},
  "mulchw.",      { RT, RA, RB }        ,{PPC405, XRC(4,168,1)},
  "mulchwu",      { RT, RA, RB }        ,{PPC405, XRC(4,136,0)},
  "mulchwu.",     { RT, RA, RB }        ,{PPC405, XRC(4,136,1)},
  "mulhhw",       { RT, RA, RB }        ,{PPC405, XRC(4,40,0)},
  "mulhhw.",      { RT, RA, RB }        ,{PPC405, XRC(4,40,1)},
  "mulhhwu",      { RT, RA, RB }        ,{PPC405, XRC(4,8,0)},
  "mulhhwu.",     { RT, RA, RB }        ,{PPC405, XRC(4,8,1)},
  "mullhw",       { RT, RA, RB }        ,{PPC405, XRC(4,424,0)},
  "mullhw.",      { RT, RA, RB }        ,{PPC405, XRC(4,424,1)},
  "mullhwu",      { RT, RA, RB }        ,{PPC405, XRC(4,392,0)},
  "mullhwu.",     { RT, RA, RB }        ,{PPC405, XRC(4,392,1)},
  "nmacchw",      { RT, RA, RB }        ,{PPC405, XO(4,174,0,0)},
  "nmacchw.",     { RT, RA, RB }        ,{PPC405, XO(4,174,0,1)},
  "nmacchwo",     { RT, RA, RB }        ,{PPC405, XO(4,174,1,0)},
  "nmacchwo.",    { RT, RA, RB }        ,{PPC405, XO(4,174,1,1)},
  "nmacchws",     { RT, RA, RB }        ,{PPC405, XO(4,238,0,0)},
  "nmacchws.",    { RT, RA, RB }        ,{PPC405, XO(4,238,0,1)},
  "nmacchwso",    { RT, RA, RB }        ,{PPC405, XO(4,238,1,0)},
  "nmacchwso.",   { RT, RA, RB }        ,{PPC405, XO(4,238,1,1)},
  "nmachhw",      { RT, RA, RB }        ,{PPC405, XO(4,46,0,0)},
  "nmachhw.",     { RT, RA, RB }        ,{PPC405, XO(4,46,0,1)},
  "nmachhwo",     { RT, RA, RB }        ,{PPC405, XO(4,46,1,0)},
  "nmachhwo.",    { RT, RA, RB }        ,{PPC405, XO(4,46,1,1)},
  "nmachhws",     { RT, RA, RB }        ,{PPC405, XO(4,110,0,0)},
  "nmachhws.",    { RT, RA, RB }        ,{PPC405, XO(4,110,0,1)},
  "nmachhwso",    { RT, RA, RB }        ,{PPC405, XO(4,110,1,0)},
  "nmachhwso.",   { RT, RA, RB }        ,{PPC405, XO(4,110,1,1)},
  "nmaclhw",      { RT, RA, RB }        ,{PPC405, XO(4,430,0,0)},
  "nmaclhw.",     { RT, RA, RB }        ,{PPC405, XO(4,430,0,1)},
  "nmaclhwo",     { RT, RA, RB }        ,{PPC405, XO(4,430,1,0)},
  "nmaclhwo.",    { RT, RA, RB }        ,{PPC405, XO(4,430,1,1)},
  "nmaclhws",     { RT, RA, RB }        ,{PPC405, XO(4,494,0,0)},
  "nmaclhws.",    { RT, RA, RB }        ,{PPC405, XO(4,494,0,1)},
  "nmaclhwso",    { RT, RA, RB }        ,{PPC405, XO(4,494,1,0)},
  "nmaclhwso.",   { RT, RA, RB }        ,{PPC405, XO(4,494,1,1)},
  "mfvscr",       { VD }                ,{AVEC,   VX(4, 1540)},
  "mtvscr",       { VB }                ,{AVEC,   VX(4, 1604)},
  "vaddcuw",      { VD, VA, VB }        ,{AVEC,   VX(4,  384)},
  "vaddfp",       { VD, VA, VB }        ,{AVEC,   VX(4,   10)},
  "vaddsbs",      { VD, VA, VB }        ,{AVEC,   VX(4,  768)},
  "vaddshs",      { VD, VA, VB }        ,{AVEC,   VX(4,  832)},
  "vaddsws",      { VD, VA, VB }        ,{AVEC,   VX(4,  896)},
  "vaddubm",      { VD, VA, VB }        ,{AVEC,   VX(4,    0)},
  "vaddubs",      { VD, VA, VB }        ,{AVEC,   VX(4,  512)},
  "vadduhm",      { VD, VA, VB }        ,{AVEC,   VX(4,   64)},
  "vadduhs",      { VD, VA, VB }        ,{AVEC,   VX(4,  576)},
  "vadduwm",      { VD, VA, VB }        ,{AVEC,   VX(4,  128)},
  "vadduws",      { VD, VA, VB }        ,{AVEC,   VX(4,  640)},
  "vand",         { VD, VA, VB }        ,{AVEC,   VX(4, 1028)},
  "vandc",        { VD, VA, VB }        ,{AVEC,   VX(4, 1092)},
  "vavgsb",       { VD, VA, VB }        ,{AVEC,   VX(4, 1282)},
  "vavgsh",       { VD, VA, VB }        ,{AVEC,   VX(4, 1346)},
  "vavgsw",       { VD, VA, VB }        ,{AVEC,   VX(4, 1410)},
  "vavgub",       { VD, VA, VB }        ,{AVEC,   VX(4, 1026)},
  "vavguh",       { VD, VA, VB }        ,{AVEC,   VX(4, 1090)},
  "vavguw",       { VD, VA, VB }        ,{AVEC,   VX(4, 1154)},
  "vcfsx",        { VD, VB, UIMM }      ,{AVEC,   VX(4,  842)},
  "vcfux",        { VD, VB, UIMM }      ,{AVEC,   VX(4,  778)},
  "vcmpbfp",      { VD, VA, VB }        ,{AVEC,   VXR(4, 966, 0)},
  "vcmpbfp.",     { VD, VA, VB }        ,{AVEC,   VXR(4, 966, 1)},
  "vcmpeqfp",     { VD, VA, VB }        ,{AVEC,   VXR(4, 198, 0)},
  "vcmpeqfp.",    { VD, VA, VB }        ,{AVEC,   VXR(4, 198, 1)},
  "vcmpequb",     { VD, VA, VB }        ,{AVEC,   VXR(4,   6, 0)},
  "vcmpequb.",    { VD, VA, VB }        ,{AVEC,   VXR(4,   6, 1)},
  "vcmpequh",     { VD, VA, VB }        ,{AVEC,   VXR(4,  70, 0)},
  "vcmpequh.",    { VD, VA, VB }        ,{AVEC,   VXR(4,  70, 1)},
  "vcmpequw",     { VD, VA, VB }        ,{AVEC,   VXR(4, 134, 0)},
  "vcmpequw.",    { VD, VA, VB }        ,{AVEC,   VXR(4, 134, 1)},
  "vcmpgefp",     { VD, VA, VB }        ,{AVEC,   VXR(4, 454, 0)},
  "vcmpgefp.",    { VD, VA, VB }        ,{AVEC,   VXR(4, 454, 1)},
  "vcmpgtfp",     { VD, VA, VB }        ,{AVEC,   VXR(4, 710, 0)},
  "vcmpgtfp.",    { VD, VA, VB }        ,{AVEC,   VXR(4, 710, 1)},
  "vcmpgtsb",     { VD, VA, VB }        ,{AVEC,   VXR(4, 774, 0)},
  "vcmpgtsb.",    { VD, VA, VB }        ,{AVEC,   VXR(4, 774, 1)},
  "vcmpgtsh",     { VD, VA, VB }        ,{AVEC,   VXR(4, 838, 0)},
  "vcmpgtsh.",    { VD, VA, VB }        ,{AVEC,   VXR(4, 838, 1)},
  "vcmpgtsw",     { VD, VA, VB }        ,{AVEC,   VXR(4, 902, 0)},
  "vcmpgtsw.",    { VD, VA, VB }        ,{AVEC,   VXR(4, 902, 1)},
  "vcmpgtub",     { VD, VA, VB }        ,{AVEC,   VXR(4, 518, 0)},
  "vcmpgtub.",    { VD, VA, VB }        ,{AVEC,   VXR(4, 518, 1)},
  "vcmpgtuh",     { VD, VA, VB }        ,{AVEC,   VXR(4, 582, 0)},
  "vcmpgtuh.",    { VD, VA, VB }        ,{AVEC,   VXR(4, 582, 1)},
  "vcmpgtuw",     { VD, VA, VB }        ,{AVEC,   VXR(4, 646, 0)},
  "vcmpgtuw.",    { VD, VA, VB }        ,{AVEC,   VXR(4, 646, 1)},
  "vctsxs",       { VD, VB, UIMM }      ,{AVEC,   VX(4,  970)},
  "vctuxs",       { VD, VB, UIMM }      ,{AVEC,   VX(4,  906)},
  "vexptefp",     { VD, VB }            ,{AVEC,   VX(4,  394)},
  "vlogefp",      { VD, VB }            ,{AVEC,   VX(4,  458)},
  "vmaddfp",      { VD, VA, VB, VC }    ,{AVEC,   VXA(4,  46)},
  "vmaxfp",       { VD, VA, VB }        ,{AVEC,   VX(4, 1034)},
  "vmaxsb",       { VD, VA, VB }        ,{AVEC,   VX(4,  258)},
  "vmaxsh",       { VD, VA, VB }        ,{AVEC,   VX(4,  322)},
  "vmaxsw",       { VD, VA, VB }        ,{AVEC,   VX(4,  386)},
  "vmaxub",       { VD, VA, VB }        ,{AVEC,   VX(4,    2)},
  "vmaxuh",       { VD, VA, VB }        ,{AVEC,   VX(4,   66)},
  "vmaxuw",       { VD, VA, VB }        ,{AVEC,   VX(4,  130)},
  "vmhaddshs",    { VD, VA, VB, VC }    ,{AVEC,   VXA(4,  32)},
  "vmhraddshs",   { VD, VA, VB, VC }    ,{AVEC,   VXA(4, 33)},
  "vminfp",       { VD, VA, VB }        ,{AVEC,   VX(4, 1098)},
  "vminsb",       { VD, VA, VB }        ,{AVEC,   VX(4,  770)},
  "vminsh",       { VD, VA, VB }        ,{AVEC,   VX(4,  834)},
  "vminsw",       { VD, VA, VB }        ,{AVEC,   VX(4,  898)},
  "vminub",       { VD, VA, VB }        ,{AVEC,   VX(4,  514)},
  "vminuh",       { VD, VA, VB }        ,{AVEC,   VX(4,  578)},
  "vminuw",       { VD, VA, VB }        ,{AVEC,   VX(4,  642)},
  "vmladduhm",    { VD, VA, VB, VC }    ,{AVEC,   VXA(4,  34)},
  "vmrghb",       { VD, VA, VB }        ,{AVEC,   VX(4,   12)},
  "vmrghh",       { VD, VA, VB }        ,{AVEC,   VX(4,   76)},
  "vmrghw",       { VD, VA, VB }        ,{AVEC,   VX(4,  140)},
  "vmrglb",       { VD, VA, VB }        ,{AVEC,   VX(4,  268)},
  "vmrglh",       { VD, VA, VB }        ,{AVEC,   VX(4,  332)},
  "vmrglw",       { VD, VA, VB }        ,{AVEC,   VX(4,  396)},
  "vmsummbm",     { VD, VA, VB, VC }    ,{AVEC,   VXA(4,  37)},
  "vmsumshm",     { VD, VA, VB, VC }    ,{AVEC,   VXA(4,  40)},
  "vmsumshs",     { VD, VA, VB, VC }    ,{AVEC,   VXA(4,  41)},
  "vmsumubm",     { VD, VA, VB, VC }    ,{AVEC,   VXA(4,  36)},
  "vmsumuhm",     { VD, VA, VB, VC }    ,{AVEC,   VXA(4,  38)},
  "vmsumuhs",     { VD, VA, VB, VC }    ,{AVEC,   VXA(4,  39)},
  "vmulesb",      { VD, VA, VB }        ,{AVEC,   VX(4,  776)},
  "vmulesh",      { VD, VA, VB }        ,{AVEC,   VX(4,  840)},
  "vmuleub",      { VD, VA, VB }        ,{AVEC,   VX(4,  520)},
  "vmuleuh",      { VD, VA, VB }        ,{AVEC,   VX(4,  584)},
  "vmulosb",      { VD, VA, VB }        ,{AVEC,   VX(4,  264)},
  "vmulosh",      { VD, VA, VB }        ,{AVEC,   VX(4,  328)},
  "vmuloub",      { VD, VA, VB }        ,{AVEC,   VX(4,    8)},
  "vmulouh",      { VD, VA, VB }        ,{AVEC,   VX(4,   72)},
  "vnmsubfp",     { VD, VA, VC, VB }    ,{AVEC,   VXA(4,  47)},
  "vnor",         { VD, VA, VB }        ,{AVEC,   VX(4, 1284)},
  "vor",          { VD, VA, VB }        ,{AVEC,   VX(4, 1156)},
  "vperm",        { VD, VA, VB, VC }    ,{AVEC,   VXA(4,  43)},
  "vpkpx",        { VD, VA, VB }        ,{AVEC,   VX(4,  782)},
  "vpkshss",      { VD, VA, VB }        ,{AVEC,   VX(4,  398)},
  "vpkshus",      { VD, VA, VB }        ,{AVEC,   VX(4,  270)},
  "vpkswss",      { VD, VA, VB }        ,{AVEC,   VX(4,  462)},
  "vpkswus",      { VD, VA, VB }        ,{AVEC,   VX(4,  334)},
  "vpkuhum",      { VD, VA, VB }        ,{AVEC,   VX(4,   14)},
  "vpkuhus",      { VD, VA, VB }        ,{AVEC,   VX(4,  142)},
  "vpkuwum",      { VD, VA, VB }        ,{AVEC,   VX(4,   78)},
  "vpkuwus",      { VD, VA, VB }        ,{AVEC,   VX(4,  206)},
  "vrefp",        { VD, VB }            ,{AVEC,   VX(4,  266)},
  "vrfim",        { VD, VB }            ,{AVEC,   VX(4,  714)},
  "vrfin",        { VD, VB }            ,{AVEC,   VX(4,  522)},
  "vrfip",        { VD, VB }            ,{AVEC,   VX(4,  650)},
  "vrfiz",        { VD, VB }            ,{AVEC,   VX(4,  586)},
  "vrlb",         { VD, VA, VB }        ,{AVEC,   VX(4,    4)},
  "vrlh",         { VD, VA, VB }        ,{AVEC,   VX(4,   68)},
  "vrlw",         { VD, VA, VB }        ,{AVEC,   VX(4,  132)},
  "vrsqrtefp",    { VD, VB }            ,{AVEC,   VX(4,  330)},
  "vsel",         { VD, VA, VB, VC }    ,{AVEC,   VXA(4,  42)},
  "vsl",          { VD, VA, VB }        ,{AVEC,   VX(4,  452)},
  "vslb",         { VD, VA, VB }        ,{AVEC,   VX(4,  260)},
  "vsldoi",       { VD, VA, VB, SHB }   ,{AVEC,   VXA(4,  44)},
  "vslh",         { VD, VA, VB }        ,{AVEC,   VX(4,  324)},
  "vslo",         { VD, VA, VB }        ,{AVEC,   VX(4, 1036)},
  "vslw",         { VD, VA, VB }        ,{AVEC,   VX(4,  388)},
  "vspltb",       { VD, VB, UIMM }      ,{AVEC,   VX(4,  524)},
  "vsplth",       { VD, VB, UIMM }      ,{AVEC,   VX(4,  588)},
  "vspltisb",     { VD, SIMM }          ,{AVEC,   VX(4,  780)},
  "vspltish",     { VD, SIMM }          ,{AVEC,   VX(4,  844)},
  "vspltisw",     { VD, SIMM }          ,{AVEC,   VX(4,  908)},
  "vspltw",       { VD, VB, UIMM }      ,{AVEC,   VX(4,  652)},
  "vsr",          { VD, VA, VB }        ,{AVEC,   VX(4,  708)},
  "vsrab",        { VD, VA, VB }        ,{AVEC,   VX(4,  772)},
  "vsrah",        { VD, VA, VB }        ,{AVEC,   VX(4,  836)},
  "vsraw",        { VD, VA, VB }        ,{AVEC,   VX(4,  900)},
  "vsrb",         { VD, VA, VB }        ,{AVEC,   VX(4,  516)},
  "vsrh",         { VD, VA, VB }        ,{AVEC,   VX(4,  580)},
  "vsro",         { VD, VA, VB }        ,{AVEC,   VX(4, 1100)},
  "vsrw",         { VD, VA, VB }        ,{AVEC,   VX(4,  644)},
  "vsubcuw",      { VD, VA, VB }        ,{AVEC,   VX(4, 1408)},
  "vsubfp",       { VD, VA, VB }        ,{AVEC,   VX(4,   74)},
  "vsubsbs",      { VD, VA, VB }        ,{AVEC,   VX(4, 1792)},
  "vsubshs",      { VD, VA, VB }        ,{AVEC,   VX(4, 1856)},
  "vsubsws",      { VD, VA, VB }        ,{AVEC,   VX(4, 1920)},
  "vsububm",      { VD, VA, VB }        ,{AVEC,   VX(4, 1024)},
  "vsububs",      { VD, VA, VB }        ,{AVEC,   VX(4, 1536)},
  "vsubuhm",      { VD, VA, VB }        ,{AVEC,   VX(4, 1088)},
  "vsubuhs",      { VD, VA, VB }        ,{AVEC,   VX(4, 1600)},
  "vsubuwm",      { VD, VA, VB }        ,{AVEC,   VX(4, 1152)},
  "vsubuws",      { VD, VA, VB }        ,{AVEC,   VX(4, 1664)},
  "vsumsws",      { VD, VA, VB }        ,{AVEC,   VX(4, 1928)},
  "vsum2sws",     { VD, VA, VB }        ,{AVEC,   VX(4, 1672)},
  "vsum4sbs",     { VD, VA, VB }        ,{AVEC,   VX(4, 1800)},
  "vsum4shs",     { VD, VA, VB }        ,{AVEC,   VX(4, 1608)},
  "vsum4ubs",     { VD, VA, VB }        ,{AVEC,   VX(4, 1544)},
  "vupkhpx",      { VD, VB }            ,{AVEC,   VX(4,  846)},
  "vupkhsb",      { VD, VB }            ,{AVEC,   VX(4,  526)},
  "vupkhsh",      { VD, VB }            ,{AVEC,   VX(4,  590)},
  "vupklpx",      { VD, VB }            ,{AVEC,   VX(4,  974)},
  "vupklsb",      { VD, VB }            ,{AVEC,   VX(4,  654)},
  "vupklsh",      { VD, VB }            ,{AVEC,   VX(4,  718)},
  "vxor",         { VD, VA, VB }        ,{AVEC,   VX(4, 1220)},
  
  "evaddw",       {RS, RA, RB}          ,{SPE,    VX(4, 512)},
  "evaddiw",      {RS, RB, UIMM}        ,{SPE,    VX(4, 514)},
  "evsubfw",      {RS, RA, RB}          ,{SPE,    VX(4, 516)},
  "evsubw",       {RS, RB, RA}          ,{SPE,    VX(4, 516)},
  "evsubifw",     {RS, UIMM, RB}        ,{SPE,    VX(4, 518)},
  "evsubiw",      {RS, RB, UIMM}        ,{SPE,    VX(4, 518)},
  "evabs",        {RS, RA}              ,{SPE,    VX(4, 520)},
  "evneg",        {RS, RA}              ,{SPE,    VX(4, 521)},
  "evextsb",      {RS, RA}              ,{SPE,    VX(4, 522)},
  "evextsh",      {RS, RA}              ,{SPE,    VX(4, 523)},
  "evrndw",       {RS, RA}              ,{SPE,    VX(4, 524)},
  "evcntlzw",     {RS, RA}              ,{SPE,    VX(4, 525)},
  "evcntlsw",     {RS, RA}              ,{SPE,    VX(4, 526)},
  "brinc",        {RS, RA, RB}          ,{SPE,    VX(4, 527)},
  "evand",        {RS, RA, RB}          ,{SPE,    VX(4, 529)},
  "evandc",       {RS, RA, RB}          ,{SPE,    VX(4, 530)},
  "evxor",        {RS, RA, RB}          ,{SPE,    VX(4, 534)},
  "evmr",         {RS, RA, BBA}         ,{SPE,    VX(4, 535)},
  "evor",         {RS, RA, RB}          ,{SPE,    VX(4, 535)},
  "evnor",        {RS, RA, RB}          ,{SPE,    VX(4, 536)},
  "evnot",        {RS, RA, BBA}         ,{SPE,    VX(4, 536)},
  "eveqv",        {RS, RA, RB}          ,{SPE,    VX(4, 537)},
  "evorc",        {RS, RA, RB}          ,{SPE,    VX(4, 539)},
  "evnand",       {RS, RA, RB}          ,{SPE,    VX(4, 542)},
  "evsrwu",       {RS, RA, RB}          ,{SPE,    VX(4, 544)},
  "evsrws",       {RS, RA, RB}          ,{SPE,    VX(4, 545)},
  "evsrwiu",      {RS, RA, EVUIMM}      ,{SPE,    VX(4, 546)},
  "evsrwis",      {RS, RA, EVUIMM}      ,{SPE,    VX(4, 547)},
  "evslw",        {RS, RA, RB}          ,{SPE,    VX(4, 548)},
  "evslwi",       {RS, RA, EVUIMM}      ,{SPE,    VX(4, 550)},
  "evrlw",        {RS, RA, RB}          ,{SPE,    VX(4, 552)},
  "evsplati",     {RS, SIMM}            ,{SPE,    VX(4, 553)},
  "evrlwi",       {RS, RA, EVUIMM}      ,{SPE,    VX(4, 554)},
  "evsplatfi",    {RS, SIMM}            ,{SPE,    VX(4, 555)},
  "evmergehi",    {RS, RA, RB}          ,{SPE,    VX(4, 556)},
  "evmergelo",    {RS, RA, RB}          ,{SPE,    VX(4, 557)},
  "evmergehilo",  {RS, RA, RB}          ,{SPE,    VX(4, 558)},
  "evmergelohi",  {RS, RA, RB}          ,{SPE,    VX(4, 559)},
  "evcmpgtu",     {CRFD, RA, RB}        ,{SPE,    VX(4, 560)},
  "evcmpgts",     {CRFD, RA, RB}        ,{SPE,    VX(4, 561)},
  "evcmpltu",     {CRFD, RA, RB}        ,{SPE,    VX(4, 562)},
  "evcmplts",     {CRFD, RA, RB}        ,{SPE,    VX(4, 563)},
  "evcmpeq",      {CRFD, RA, RB}        ,{SPE,    VX(4, 564)},
  "evsel",        {RS, RA, RB, CRFS}    ,{SPR,    EVSEL(4,79)},
  "evfsadd",      {RS, RA, RB}          ,{SPE,    VX(4, 640)},
  "evfssub",      {RS, RA, RB}          ,{SPE,    VX(4, 641)},
  "evfsabs",      {RS, RA}              ,{SPE,    VX(4, 644)},
  "evfsnabs",     {RS, RA}              ,{SPE,    VX(4, 645)},
  "evfsneg",      {RS, RA}              ,{SPE,    VX(4, 646)},
  "evfsmul",      {RS, RA, RB}          ,{SPE,    VX(4, 648)},
  "evfsdiv",      {RS, RA, RB}          ,{SPE,    VX(4, 649)},
  "evfscmpgt",    {CRFD, RA, RB}        ,{SPE,    VX(4, 652)},
  "evfscmplt",    {CRFD, RA, RB}        ,{SPE,    VX(4, 653)},
  "evfscmpeq",    {CRFD, RA, RB}        ,{SPE,    VX(4, 654)},
  "evfscfui",     {RS, RB}              ,{SPE,    VX(4, 656)},
  "evfscfsi",     {RS, RB}              ,{SPE,    VX(4, 657)},
  "evfscfuf",     {RS, RB}              ,{SPE,    VX(4, 658)},
  "evfscfsf",     {RS, RB}              ,{SPE,    VX(4, 659)},
  "evfsctui",     {RS, RB}              ,{SPE,    VX(4, 660)},
  "evfsctsi",     {RS, RB}              ,{SPE,    VX(4, 661)},
  "evfsctuf",     {RS, RB}              ,{SPE,    VX(4, 662)},
  "evfsctsf",     {RS, RB}              ,{SPE,    VX(4, 663)},
  "evfsctuiz",    {RS, RB}              ,{SPE,    VX(4, 664)},
  "evfsctsiz",    {RS, RB}              ,{SPE,    VX(4, 666)},
  "evfststgt",    {CRFD, RA, RB}        ,{SPE,    VX(4, 668)},
  "evfststlt",    {CRFD, RA, RB}        ,{SPE,    VX(4, 669)},
  "evfststeq",    {CRFD, RA, RB}        ,{SPE,    VX(4, 670)},
  "evlddx",       {RS, RA, RB}          ,{SPE,    VX(4, 768)},
  "evldd",        {RS, EVUIMM_8, RA}    ,{SPE,    VX(4, 769)},
  "evldwx",       {RS, RA, RB}          ,{SPE,    VX(4, 770)},
  "evldw",        {RS, EVUIMM_8, RA}    ,{SPE,    VX(4, 771)},
  "evldhx",       {RS, RA, RB}          ,{SPE,    VX(4, 772)},
  "evldh",        {RS, EVUIMM_8, RA}    ,{SPE,    VX(4, 773)},
  "evlhhesplatx", {RS, RA, RB}          ,{SPE,    VX(4, 776)},
  "evlhhesplat",  {RS, EVUIMM_2, RA}    ,{SPE,    VX(4, 777)},
  "evlhhousplatx",{RS, RA, RB}          ,{SPE,    VX(4, 780)},
  "evlhhousplat", {RS, EVUIMM_2, RA}    ,{SPE,    VX(4, 781)},
  "evlhhossplatx",{RS, RA, RB}          ,{SPE,    VX(4, 782)},
  "evlhhossplat", {RS, EVUIMM_2, RA}    ,{SPE,    VX(4, 783)},
  "evlwhex",      {RS, RA, RB}          ,{SPE,    VX(4, 784)},
  "evlwhe",       {RS, EVUIMM_4, RA}    ,{SPE,    VX(4, 785)},
  "evlwhoux",     {RS, RA, RB}          ,{SPE,    VX(4, 788)},
  "evlwhou",      {RS, EVUIMM_4, RA}    ,{SPE,    VX(4, 789)},
  "evlwhosx",     {RS, RA, RB}          ,{SPE,    VX(4, 790)},
  "evlwhos",      {RS, EVUIMM_4, RA}    ,{SPE,    VX(4, 791)},
  "evlwwsplatx",  {RS, RA, RB}          ,{SPE,    VX(4, 792)},
  "evlwwsplat",   {RS, EVUIMM_4, RA}    ,{SPE,    VX(4, 793)},
  "evlwhsplatx",  {RS, RA, RB}          ,{SPE,    VX(4, 796)},
  "evlwhsplat",   {RS, EVUIMM_4, RA}    ,{SPE,    VX(4, 797)},
  "evstddx",      {RS, RA, RB}          ,{SPE,    VX(4, 800)},
  "evstdd",       {RS, EVUIMM_8, RA}    ,{SPE,    VX(4, 801)},
  "evstdwx",      {RS, RA, RB}          ,{SPE,    VX(4, 802)},
  "evstdw",       {RS, EVUIMM_8, RA}    ,{SPE,    VX(4, 803)},
  "evstdhx",      {RS, RA, RB}          ,{SPE,    VX(4, 804)},
  "evstdh",       {RS, EVUIMM_8, RA}    ,{SPE,    VX(4, 805)},
  "evstwhex",     {RS, RA, RB}          ,{SPE,    VX(4, 816)},
  "evstwhe",      {RS, EVUIMM_4, RA}    ,{SPE,    VX(4, 817)},
  "evstwhox",     {RS, RA, RB}          ,{SPE,    VX(4, 820)},
  "evstwho",      {RS, EVUIMM_4, RA}    ,{SPE,    VX(4, 821)},
  "evstwwex",     {RS, RA, RB}          ,{SPE,    VX(4, 824)},
  "evstwwe",      {RS, EVUIMM_4, RA}    ,{SPE,    VX(4, 825)},
  "evstwwox",     {RS, RA, RB}          ,{SPE,    VX(4, 828)},
  "evstwwo",      {RS, EVUIMM_4, RA}    ,{SPE,    VX(4, 829)},
  "evmhessf",     {RS, RA, RB}          ,{SPE,    VX(4,1027)},
  "evmhossf",     {RS, RA, RB}          ,{SPE,    VX(4,1031)},
  "evmheumi",     {RS, RA, RB}          ,{SPE,    VX(4,1032)},
  "evmhesmi",     {RS, RA, RB}          ,{SPE,    VX(4,1033)},
  "evmhesmf",     {RS, RA, RB}          ,{SPE,    VX(4,1035)},
  "evmhoumi",     {RS, RA, RB}          ,{SPE,    VX(4,1036)},
  "evmhosmi",     {RS, RA, RB}          ,{SPE,    VX(4,1037)},
  "evmhosmf",     {RS, RA, RB}          ,{SPE,    VX(4,1039)},
  "evmhessfa",    {RS, RA, RB}          ,{SPE,    VX(4,1059)},
  "evmhossfa",    {RS, RA, RB}          ,{SPE,    VX(4,1063)},
  "evmheumia",    {RS, RA, RB}          ,{SPE,    VX(4,1064)},
  "evmhesmia",    {RS, RA, RB}          ,{SPE,    VX(4,1065)},
  "evmhesmfa",    {RS, RA, RB}          ,{SPE,    VX(4,1067)},
  "evmhoumia",    {RS, RA, RB}          ,{SPE,    VX(4,1068)},
  "evmhosmia",    {RS, RA, RB}          ,{SPE,    VX(4,1069)},
  "evmhosmfa",    {RS, RA, RB}          ,{SPE,    VX(4,1071)},
  "evmwhssf",     {RS, RA, RB}          ,{SPE,    VX(4,1095)},
  "evmwlumi",     {RS, RA, RB}          ,{SPE,    VX(4,1096)},
  "evmwhumi",     {RS, RA, RB}          ,{SPE,    VX(4,1100)},
  "evmwhsmi",     {RS, RA, RB}          ,{SPE,    VX(4,1101)},
  "evmwhsmf",     {RS, RA, RB}          ,{SPE,    VX(4,1103)},
  "evmwssf",      {RS, RA, RB}          ,{SPE,    VX(4,1107)},
  "evmwumi",      {RS, RA, RB}          ,{SPE,    VX(4,1112)},
  "evmwsmi",      {RS, RA, RB}          ,{SPE,    VX(4,1113)},
  "evmwsmf",      {RS, RA, RB}          ,{SPE,    VX(4,1115)},
  "evmwhssfa",    {RS, RA, RB}          ,{SPE,    VX(4,1127)},
  "evmwlumia",    {RS, RA, RB}          ,{SPE,    VX(4,1128)},
  "evmwhumia",    {RS, RA, RB}          ,{SPE,    VX(4,1132)},
  "evmwhsmia",    {RS, RA, RB}          ,{SPE,    VX(4,1133)},
  "evmwhsmfa",    {RS, RA, RB}          ,{SPE,    VX(4,1135)},
  "evmwssfa",     {RS, RA, RB}          ,{SPE,    VX(4,1139)},
  "evmwumia",     {RS, RA, RB}          ,{SPE,    VX(4,1144)},
  "evmwsmia",     {RS, RA, RB}          ,{SPE,    VX(4,1145)},
  "evmwsmfa",     {RS, RA, RB}          ,{SPE,    VX(4,1147)},
  "evaddusiaaw",  {RS, RA}              ,{SPE,    VX(4,1216)},
  "evaddssiaaw",  {RS, RA}              ,{SPE,    VX(4,1217)},
  "evsubfusiaaw", {RS, RA}              ,{SPE,    VX(4,1218)},
  "evsubfssiaaw", {RS, RA}              ,{SPE,    VX(4,1219)},
  "evmra",        {RS, RA}              ,{SPE,    VX(4,1220)},
  "evdivws",      {RS, RA, RB}          ,{SPE,    VX(4,1222)},
  "evdivwu",      {RS, RA, RB}          ,{SPE,    VX(4,1223)},
  "evaddumiaaw",  {RS, RA}              ,{SPE,    VX(4,1224)},
  "evaddsmiaaw",  {RS, RA}              ,{SPE,    VX(4,1225)},
  "evsubfumiaaw", {RS, RA}              ,{SPE,    VX(4,1226)},
  "evsubfsmiaaw", {RS, RA}              ,{SPE,    VX(4,1227)},
  "evmheusiaaw",  {RS, RA, RB}          ,{SPE,    VX(4,1280)},
  "evmhessiaaw",  {RS, RA, RB}          ,{SPE,    VX(4,1281)},
  "evmhessfaaw",  {RS, RA, RB}          ,{SPE,    VX(4,1283)},
  "evmhousiaaw",  {RS, RA, RB}          ,{SPE,    VX(4,1284)},
  "evmhossiaaw",  {RS, RA, RB}          ,{SPE,    VX(4,1285)},
  "evmhossfaaw",  {RS, RA, RB}          ,{SPE,    VX(4,1287)},
  "evmheumiaaw",  {RS, RA, RB}          ,{SPE,    VX(4,1288)},
  "evmhesmiaaw",  {RS, RA, RB}          ,{SPE,    VX(4,1289)},
  "evmhesmfaaw",  {RS, RA, RB}          ,{SPE,    VX(4,1291)},
  "evmhoumiaaw",  {RS, RA, RB}          ,{SPE,    VX(4,1292)},
  "evmhosmiaaw",  {RS, RA, RB}          ,{SPE,    VX(4,1293)},
  "evmhosmfaaw",  {RS, RA, RB}          ,{SPE,    VX(4,1295)},
  "evmhegumiaa",  {RS, RA, RB}          ,{SPE,    VX(4,1320)},
  "evmhegsmiaa",  {RS, RA, RB}          ,{SPE,    VX(4,1321)},
  "evmhegsmfaa",  {RS, RA, RB}          ,{SPE,    VX(4,1323)},
  "evmhogumiaa",  {RS, RA, RB}          ,{SPE,    VX(4,1324)},
  "evmhogsmiaa",  {RS, RA, RB}          ,{SPE,    VX(4,1325)},
  "evmhogsmfaa",  {RS, RA, RB}          ,{SPE,    VX(4,1327)},
  "evmwlusiaaw",  {RS, RA, RB}          ,{SPE,    VX(4,1344)},
  "evmwlssiaaw",  {RS, RA, RB}          ,{SPE,    VX(4,1345)},
  "evmwlumiaaw",  {RS, RA, RB}          ,{SPE,    VX(4,1352)},
  "evmwlsmiaaw",  {RS, RA, RB}          ,{SPE,    VX(4,1353)},
  "evmwssfaa",    {RS, RA, RB}          ,{SPE,    VX(4,1363)},
  "evmwumiaa",    {RS, RA, RB}          ,{SPE,    VX(4,1368)},
  "evmwsmiaa",    {RS, RA, RB}          ,{SPE,    VX(4,1369)},
  "evmwsmfaa",    {RS, RA, RB}          ,{SPE,    VX(4,1371)},
  "evmheusianw",  {RS, RA, RB}          ,{SPE,    VX(4,1408)},
  "evmhessianw",  {RS, RA, RB}          ,{SPE,    VX(4,1409)},
  "evmhessfanw",  {RS, RA, RB}          ,{SPE,    VX(4,1411)},
  "evmhousianw",  {RS, RA, RB}          ,{SPE,    VX(4,1412)},
  "evmhossianw",  {RS, RA, RB}          ,{SPE,    VX(4,1413)},
  "evmhossfanw",  {RS, RA, RB}          ,{SPE,    VX(4,1415)},
  "evmheumianw",  {RS, RA, RB}          ,{SPE,    VX(4,1416)},
  "evmhesmianw",  {RS, RA, RB}          ,{SPE,    VX(4,1417)},
  "evmhesmfanw",  {RS, RA, RB}          ,{SPE,    VX(4,1419)},
  "evmhoumianw",  {RS, RA, RB}          ,{SPE,    VX(4,1420)},
  "evmhosmianw",  {RS, RA, RB}          ,{SPE,    VX(4,1421)},
  "evmhosmfanw",  {RS, RA, RB}          ,{SPE,    VX(4,1423)},
  "evmhegumian",  {RS, RA, RB}          ,{SPE,    VX(4,1448)},
  "evmhegsmian",  {RS, RA, RB}          ,{SPE,    VX(4,1449)},
  "evmhegsmfan",  {RS, RA, RB}          ,{SPE,    VX(4,1451)},
  "evmhogumian",  {RS, RA, RB}          ,{SPE,    VX(4,1452)},
  "evmhogsmian",  {RS, RA, RB}          ,{SPE,    VX(4,1453)},
  "evmhogsmfan",  {RS, RA, RB}          ,{SPE,    VX(4,1455)},
  "evmwlusianw",  {RS, RA, RB}          ,{SPE,    VX(4,1472)},
  "evmwlssianw",  {RS, RA, RB}          ,{SPE,    VX(4,1473)},
  "evmwlumianw",  {RS, RA, RB}          ,{SPE,    VX(4,1480)},
  "evmwlsmianw",  {RS, RA, RB}          ,{SPE,    VX(4,1481)},
  "evmwssfan",    {RS, RA, RB}          ,{SPE,    VX(4,1491)},
  "evmwumian",    {RS, RA, RB}          ,{SPE,    VX(4,1496)},
  "evmwsmian",    {RS, RA, RB}          ,{SPE,    VX(4,1497)},
  "evmwsmfan",    {RS, RA, RB}          ,{SPE,    VX(4,1499)},

  "efsadd",       {RS, RA, RB}          ,{EFS,    VX(4, 704)},
  "efsadd",       {RS, RA, RB}          ,{EFS,    VX(4, 704)},
  "efssub",       {RS, RA, RB}          ,{EFS,    VX(4, 705)},
  "efsabs",       {RS, RA}              ,{EFS,    VX(4, 708)},
  "efsnabs",      {RS, RA}              ,{EFS,    VX(4, 709)},
  "efsneg",       {RS, RA}              ,{EFS,    VX(4, 710)},
  "efsmul",       {RS, RA, RB}          ,{EFS,    VX(4, 712)},
  "efsdiv",       {RS, RA, RB}          ,{EFS,    VX(4, 713)},
  "efscmpgt",     {CRFD, RA, RB}        ,{EFS,    VX(4, 716)},
  "efscmplt",     {CRFD, RA, RB}        ,{EFS,    VX(4, 717)},
  "efscmpeq",     {CRFD, RA, RB}        ,{EFS,    VX(4, 718)},
  "efscfd",       {RS, RB}              ,{EFS,    VX(4, 719)},
  "efscfui",      {RS, RB}              ,{EFS,    VX(4, 720)},
  "efscfsi",      {RS, RB}              ,{EFS,    VX(4, 721)},
  "efscfuf",      {RS, RB}              ,{EFS,    VX(4, 722)},
  "efscfsf",      {RS, RB}              ,{EFS,    VX(4, 723)},
  "efsctui",      {RS, RB}              ,{EFS,    VX(4, 724)},
  "efsctsi",      {RS, RB}              ,{EFS,    VX(4, 725)},
  "efsctuf",      {RS, RB}              ,{EFS,    VX(4, 726)},
  "efsctsf",      {RS, RB}              ,{EFS,    VX(4, 727)},
  "efsctuiz",     {RS, RB}              ,{EFS,    VX(4, 728)},
  "efsctsiz",     {RS, RB}              ,{EFS,    VX(4, 730)},
  "efststgt",     {CRFD, RA, RB}        ,{EFS,    VX(4, 732)},
  "efststlt",     {CRFD, RA, RB}        ,{EFS,    VX(4, 733)},
  "efststeq",     {CRFD, RA, RB}        ,{EFS,    VX(4, 734)},
  "efdadd",       {RS, RA, RB}          ,{EFS,    VX(4, 736)},
  "efdsub",       {RS, RA, RB}          ,{EFS,    VX(4, 737)},
  "efdcfuid",     {RS, RB}              ,{EFS,    VX(4, 738)},
  "efdcfsid",     {RS, RB}              ,{EFS,    VX(4, 739)},
  "efdabs",       {RS, RA}              ,{EFS,    VX(4, 740)},
  "efdnabs",      {RS, RA}              ,{EFS,    VX(4, 741)},
  "efdneg",       {RS, RA}              ,{EFS,    VX(4, 742)},
  "efdmul",       {RS, RA, RB}          ,{EFS,    VX(4, 744)},
  "efddiv",       {RS, RA, RB}          ,{EFS,    VX(4, 745)},
  "efdctuidz",    {RS, RB}              ,{EFS,    VX(4, 746)},
  "efdctsidz",    {RS, RB}              ,{EFS,    VX(4, 747)},
  "efdcmpgt",     {CRFD, RA, RB}        ,{EFS,    VX(4, 748)},
  "efdcmplt",     {CRFD, RA, RB}        ,{EFS,    VX(4, 749)},
  "efdcmpeq",     {CRFD, RA, RB}        ,{EFS,    VX(4, 750)},
  "efdcfs",       {RS, RB}              ,{EFS,    VX(4, 751)},
  "efdcfui",      {RS, RB}              ,{EFS,    VX(4, 752)},
  "efdcfsi",      {RS, RB}              ,{EFS,    VX(4, 753)},
  "efdcfuf",      {RS, RB}              ,{EFS,    VX(4, 754)},
  "efdcfsf",      {RS, RB}              ,{EFS,    VX(4, 755)},
  "efdctui",      {RS, RB}              ,{EFS,    VX(4, 756)},
  "efdctsi",      {RS, RB}              ,{EFS,    VX(4, 757)},
  "efdctuf",      {RS, RB}              ,{EFS,    VX(4, 758)},
  "efdctsf",      {RS, RB}              ,{EFS,    VX(4, 759)},
  "efdctuiz",     {RS, RB}              ,{EFS,    VX(4, 760)},
  "efdctsiz",     {RS, RB}              ,{EFS,    VX(4, 762)},
  "efdtstgt",     {CRFD, RA, RB}        ,{EFS,    VX(4, 764)},
  "efdtstlt",     {CRFD, RA, RB}        ,{EFS,    VX(4, 765)},
  "efdtsteq",     {CRFD, RA, RB}        ,{EFS,    VX(4, 766)},

#if 0 /* Xilinx */
  "get",          { RT, FSL }           ,{PPC405, APU(4,268,0)},
  "cget",         { RT, FSL }           ,{PPC405, APU(4,284,0)},
  "nget",         { RT, FSL }           ,{PPC405, APU(4,300,0)},
  "ncget",        { RT, FSL }           ,{PPC405, APU(4,316,0)},
  "put",          { RT, FSL }           ,{PPC405, APU(4,332,0)},
  "cput",         { RT, FSL }           ,{PPC405, APU(4,348,0)},
  "nput",         { RT, FSL }           ,{PPC405, APU(4,364,0)},
  "ncput",        { RT, FSL }           ,{PPC405, APU(4,380,0)},
  "udi0fcm."      { URT, URA, URB }     ,{PPC45,  APU(4,415,0)},
  "udi0fcm"       { URT, URA, URB }     ,{PPC45,  APU(4,415,1)},
  "udi1fcm."      { URT, URA, URB }     ,{PPC45,  APU(4,547,0)},
  "udi1fcm"       { URT, URA, URB }     ,{PPC45,  APU(4,547,1)},
  "udi2fcm."      { URT, URA, URB }     ,{PPC45,  APU(4,579,0)},
  "udi2fcm"       { URT, URA, URB }     ,{PPC45,  APU(4,579,1)},
  "udi3fcm."      { URT, URA, URB }     ,{PPC45,  APU(4,611,0)},
  "udi3fcm"       { URT, URA, URB }     ,{PPC45,  APU(4,611,1)},
  "udi4fcm."      { URT, URA, URB }     ,{PPC45,  APU(4,643,0)},
  "udi4fcm"       { URT, URA, URB }     ,{PPC45,  APU(4,643,1)},
  "udi5fcm."      { URT, URA, URB }     ,{PPC45,  APU(4,675,0)},
  "udi5fcm"       { URT, URA, URB }     ,{PPC45,  APU(4,675,1)},
  "udi6fcm."      { URT, URA, URB }     ,{PPC45,  APU(4,707,0)},
  "udi6fcm"       { URT, URA, URB }     ,{PPC45,  APU(4,707,1)},
  "udi7fcm."      { URT, URA, URB }     ,{PPC45,  APU(4,739,0)},
  "udi7fcm"       { URT, URA, URB }     ,{PPC45,  APU(4,739,1)},
  "udi8fcm."      { URT, URA, URB }     ,{PPC45,  APU(4,771,0)},
  "udi8fcm"       { URT, URA, URB }     ,{PPC440 ,APU(4,771,1)},
  "udi9fcm."      { URT, URA, URB }     ,{PPC440 ,APU(4,804,0)},
  "udi9fcm"       { URT, URA, URB }     ,{PPC440 ,APU(4,804,1)},
  "udi10fcm."     { URT, URA, URB }     ,{PPC440 ,APU(4,835,0)},
  "udi10fcm"      { URT, URA, URB }     ,{PPC440 ,APU(4,835,1)},
  "udi11fcm."     { URT, URA, URB }     ,{PPC440 ,APU(4,867,0)},
  "udi11fcm"      { URT, URA, URB }     ,{PPC440 ,APU(4,867,1)},
  "udi12fcm."     { URT, URA, URB }     ,{PPC440 ,APU(4,899,0)},
  "udi12fcm"      { URT, URA, URB }     ,{PPC440 ,APU(4,899,1)},
  "udi13fcm."     { URT, URA, URB }     ,{PPC440 ,APU(4,931,0)},
  "udi13fcm"      { URT, URA, URB }     ,{PPC440 ,APU(4,931,1)},
  "udi14fcm."     { URT, URA, URB }     ,{PPC440 ,APU(4,963,0)},
  "udi14fcm"      { URT, URA, URB }     ,{PPC440 ,APU(4,963,1)},
  "udi15fcm."     { URT, URA, URB }     ,{PPC440 ,APU(4,995,0)},
  "udi15fcm"      { URT, URA, URB }     ,{PPC440 ,APU(4,995,1)},
#endif

  "mulli",        { RT, RA, SI }        ,{PPCCOM, OP(7)},
  "muli",         { RT, RA, SI }        ,{PWRCOM, OP(7)},

  "subfic",       { RT, RA, SI }        ,{PPCCOM, OP(8)},
  "sfi",          { RT, RA, SI }        ,{PWRCOM, OP(8)},

  "dozi",         { RT, RA, SI }        ,{M601,   OP(9)},

  "cmplwi",       { OBF, RA, UI }       ,{PPCCOM, OPL(10,0)},
  "cmpldi",       { OBF, RA, UI }       ,{PPC64,  OPL(10,1)},
  "cmpli",        { BF, L, RA, UI }     ,{PPCONLY,OP(10)},
  "cmpli",        { BF, RA, UI }        ,{PWRCOM, OP(10)},

  "cmpwi",        { OBF, RA, SI }       ,{PPCCOM, OPL(11,0)},
  "cmpdi",        { OBF, RA, SI }       ,{PPC64,  OPL(11,1)},
  "cmpi",         { BF, L, RA, SI }     ,{PPCONLY,OP(11)},
  "cmpi",         { BF, RA, SI }        ,{PWRCOM, OP(11)},

  "addic",        { RT, RA, SI }        ,{PPCCOM, OP(12)},
  "ai",           { RT, RA, SI }        ,{PWRCOM, OP(12)},
  "subic",        { RT, RA, NSI }       ,{PPCCOM, OP(12)},

  "addic.",       { RT, RA, SI }        ,{PPCCOM, OP(13)},
  "ai.",          { RT, RA, SI }        ,{PWRCOM, OP(13)},
  "subic.",       { RT, RA, NSI }       ,{PPCCOM, OP(13)},

  "li",           { RT, SI }            ,{PPCCOM, OP(14)},
  "lil",          { RT, SI }            ,{PWRCOM, OP(14)},
  "addi",         { RT, RA, SI }        ,{PPCCOM, OP(14)},
  "cal",          { RT, D, RA }         ,{PWRCOM, OP(14)},
  "subi",         { RT, RA, NSI }       ,{PPCCOM, OP(14)},
  "la",           { RT, D, RA }         ,{PPCCOM, OP(14)},

  "lis",          { RT, SISIGNOPT }     ,{PPCCOM, OP(15)},
  "liu",          { RT, SISIGNOPT }     ,{PWRCOM, OP(15)},
  "addis",        { RT,RA,SISIGNOPT }   ,{PPCCOM, OP(15)},
  "cau",          { RT,RA,SISIGNOPT }   ,{PWRCOM, OP(15)},
  "subis",        { RT, RA, NSI }       ,{PPCCOM, OP(15)},

  "bdnz-",        { BDM }               ,{PPCCOM, BBO(16,BODNZ,0,0)},
  "bdnz+",        { BDP }               ,{PPCCOM, BBO(16,BODNZ,0,0)},
  "bdnz",         { BD }                ,{PPCCOM, BBO(16,BODNZ,0,0)},
  "bdn",          { BD }                ,{PWRCOM, BBO(16,BODNZ,0,0)},
  "bdnzl-",       { BDM }               ,{PPCCOM, BBO(16,BODNZ,0,1)},
  "bdnzl+",       { BDP }               ,{PPCCOM, BBO(16,BODNZ,0,1)},
  "bdnzl",        { BD }                ,{PPCCOM, BBO(16,BODNZ,0,1)},
  "bdnl",         { BD }                ,{PWRCOM, BBO(16,BODNZ,0,1)},
  "bdnza-",       { BDMA }              ,{PPCCOM, BBO(16,BODNZ,1,0)},
  "bdnza+",       { BDPA }              ,{PPCCOM, BBO(16,BODNZ,1,0)},
  "bdnza",        { BDA }               ,{PPCCOM, BBO(16,BODNZ,1,0)},
  "bdna",         { BDA }               ,{PWRCOM, BBO(16,BODNZ,1,0)},
  "bdnzla-",      { BDMA }              ,{PPCCOM, BBO(16,BODNZ,1,1)},
  "bdnzla+",      { BDPA }              ,{PPCCOM, BBO(16,BODNZ,1,1)},
  "bdnzla",       { BDA }               ,{PPCCOM, BBO(16,BODNZ,1,1)},
  "bdnla",        { BDA }               ,{PWRCOM, BBO(16,BODNZ,1,1)},
  "bdz-",         { BDM }               ,{PPCCOM, BBO(16,BODZ,0,0)},
  "bdz+",         { BDP }               ,{PPCCOM, BBO(16,BODZ,0,0)},
  "bdz",          { BD }                ,{COM,    BBO(16,BODZ,0,0)},
  "bdzl-",        { BDM }               ,{PPCCOM, BBO(16,BODZ,0,1)},
  "bdzl+",        { BDP }               ,{PPCCOM, BBO(16,BODZ,0,1)},
  "bdzl",         { BD }                ,{COM,    BBO(16,BODZ,0,1)},
  "bdza-",        { BDMA }              ,{PPCCOM, BBO(16,BODZ,1,0)},
  "bdza+",        { BDPA }              ,{PPCCOM, BBO(16,BODZ,1,0)},
  "bdza",         { BDA }               ,{COM,    BBO(16,BODZ,1,0)},
  "bdzla-",       { BDMA }              ,{PPCCOM, BBO(16,BODZ,1,1)},
  "bdzla+",       { BDPA }              ,{PPCCOM, BBO(16,BODZ,1,1)},
  "bdzla",        { BDA }               ,{COM,    BBO(16,BODZ,1,1)},
  "blt-",         { CR, BDM }           ,{PPCCOM, BBOCB(16,BOT,CBLT,0,0)},
  "blt+",         { CR, BDP }           ,{PPCCOM, BBOCB(16,BOT,CBLT,0,0)},
  "blt",          { CR, BD }            ,{COM,    BBOCB(16,BOT,CBLT,0,0)},
  "bltl-",        { CR, BDM }           ,{PPCCOM, BBOCB(16,BOT,CBLT,0,1)},
  "bltl+",        { CR, BDP }           ,{PPCCOM, BBOCB(16,BOT,CBLT,0,1)},
  "bltl",         { CR, BD }            ,{COM,    BBOCB(16,BOT,CBLT,0,1)},
  "blta-",        { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOT,CBLT,1,0)},
  "blta+",        { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOT,CBLT,1,0)},
  "blta",         { CR, BDA }           ,{COM,    BBOCB(16,BOT,CBLT,1,0)},
  "bltla-",       { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOT,CBLT,1,1)},
  "bltla+",       { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOT,CBLT,1,1)},
  "bltla",        { CR, BDA }           ,{COM,    BBOCB(16,BOT,CBLT,1,1)},
  "bgt-",         { CR, BDM }           ,{PPCCOM, BBOCB(16,BOT,CBGT,0,0)},
  "bgt+",         { CR, BDP }           ,{PPCCOM, BBOCB(16,BOT,CBGT,0,0)},
  "bgt",          { CR, BD }            ,{COM,    BBOCB(16,BOT,CBGT,0,0)},
  "bgtl-",        { CR, BDM }           ,{PPCCOM, BBOCB(16,BOT,CBGT,0,1)},
  "bgtl+",        { CR, BDP }           ,{PPCCOM, BBOCB(16,BOT,CBGT,0,1)},
  "bgtl",         { CR, BD }            ,{COM,    BBOCB(16,BOT,CBGT,0,1)},
  "bgta-",        { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOT,CBGT,1,0)},
  "bgta+",        { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOT,CBGT,1,0)},
  "bgta",         { CR, BDA }           ,{COM,    BBOCB(16,BOT,CBGT,1,0)},
  "bgtla-",       { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOT,CBGT,1,1)},
  "bgtla+",       { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOT,CBGT,1,1)},
  "bgtla",        { CR, BDA }           ,{COM,    BBOCB(16,BOT,CBGT,1,1)},
  "beq-",         { CR, BDM }           ,{PPCCOM, BBOCB(16,BOT,CBEQ,0,0)},
  "beq+",         { CR, BDP }           ,{PPCCOM, BBOCB(16,BOT,CBEQ,0,0)},
  "beq",          { CR, BD }            ,{COM,    BBOCB(16,BOT,CBEQ,0,0)},
  "beql-",        { CR, BDM }           ,{PPCCOM, BBOCB(16,BOT,CBEQ,0,1)},
  "beql+",        { CR, BDP }           ,{PPCCOM, BBOCB(16,BOT,CBEQ,0,1)},
  "beql",         { CR, BD }            ,{COM,    BBOCB(16,BOT,CBEQ,0,1)},
  "beqa-",        { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOT,CBEQ,1,0)},
  "beqa+",        { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOT,CBEQ,1,0)},
  "beqa",         { CR, BDA }           ,{COM,    BBOCB(16,BOT,CBEQ,1,0)},
  "beqla-",       { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOT,CBEQ,1,1)},
  "beqla+",       { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOT,CBEQ,1,1)},
  "beqla",        { CR, BDA }           ,{COM,    BBOCB(16,BOT,CBEQ,1,1)},
  "bso-",         { CR, BDM }           ,{PPCCOM, BBOCB(16,BOT,CBSO,0,0)},
  "bso+",         { CR, BDP }           ,{PPCCOM, BBOCB(16,BOT,CBSO,0,0)},
  "bso",          { CR, BD }            ,{COM,    BBOCB(16,BOT,CBSO,0,0)},
  "bsol-",        { CR, BDM }           ,{PPCCOM, BBOCB(16,BOT,CBSO,0,1)},
  "bsol+",        { CR, BDP }           ,{PPCCOM, BBOCB(16,BOT,CBSO,0,1)},
  "bsol",         { CR, BD }            ,{COM,    BBOCB(16,BOT,CBSO,0,1)},
  "bsoa-",        { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOT,CBSO,1,0)},
  "bsoa+",        { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOT,CBSO,1,0)},
  "bsoa",         { CR, BDA }           ,{COM,    BBOCB(16,BOT,CBSO,1,0)},
  "bsola-",       { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOT,CBSO,1,1)},
  "bsola+",       { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOT,CBSO,1,1)},
  "bsola",        { CR, BDA }           ,{COM,    BBOCB(16,BOT,CBSO,1,1)},
  "bun-",         { CR, BDM }           ,{PPCCOM, BBOCB(16,BOT,CBSO,0,0)},
  "bun+",         { CR, BDP }           ,{PPCCOM, BBOCB(16,BOT,CBSO,0,0)},
  "bun",          { CR, BD }            ,{PPCCOM, BBOCB(16,BOT,CBSO,0,0)},
  "bunl-",        { CR, BDM }           ,{PPCCOM, BBOCB(16,BOT,CBSO,0,1)},
  "bunl+",        { CR, BDP }           ,{PPCCOM, BBOCB(16,BOT,CBSO,0,1)},
  "bunl",         { CR, BD }            ,{PPCCOM, BBOCB(16,BOT,CBSO,0,1)},
  "buna-",        { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOT,CBSO,1,0)},
  "buna+",        { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOT,CBSO,1,0)},
  "buna",         { CR, BDA }           ,{PPCCOM, BBOCB(16,BOT,CBSO,1,0)},
  "bunla-",       { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOT,CBSO,1,1)},
  "bunla+",       { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOT,CBSO,1,1)},
  "bunla",        { CR, BDA }           ,{PPCCOM, BBOCB(16,BOT,CBSO,1,1)},
  "bge-",         { CR, BDM }           ,{PPCCOM, BBOCB(16,BOF,CBLT,0,0)},
  "bge+",         { CR, BDP }           ,{PPCCOM, BBOCB(16,BOF,CBLT,0,0)},
  "bge",          { CR, BD }            ,{COM,    BBOCB(16,BOF,CBLT,0,0)},
  "bgel-",        { CR, BDM }           ,{PPCCOM, BBOCB(16,BOF,CBLT,0,1)},
  "bgel+",        { CR, BDP }           ,{PPCCOM, BBOCB(16,BOF,CBLT,0,1)},
  "bgel",         { CR, BD }            ,{COM,    BBOCB(16,BOF,CBLT,0,1)},
  "bgea-",        { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOF,CBLT,1,0)},
  "bgea+",        { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOF,CBLT,1,0)},
  "bgea",         { CR, BDA }           ,{COM,    BBOCB(16,BOF,CBLT,1,0)},
  "bgela-",       { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOF,CBLT,1,1)},
  "bgela+",       { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOF,CBLT,1,1)},
  "bgela",        { CR, BDA }           ,{COM,    BBOCB(16,BOF,CBLT,1,1)},
  "bnl-",         { CR, BDM }           ,{PPCCOM, BBOCB(16,BOF,CBLT,0,0)},
  "bnl+",         { CR, BDP }           ,{PPCCOM, BBOCB(16,BOF,CBLT,0,0)},
  "bnl",          { CR, BD }            ,{COM,    BBOCB(16,BOF,CBLT,0,0)},
  "bnll-",        { CR, BDM }           ,{PPCCOM, BBOCB(16,BOF,CBLT,0,1)},
  "bnll+",        { CR, BDP }           ,{PPCCOM, BBOCB(16,BOF,CBLT,0,1)},
  "bnll",         { CR, BD }            ,{COM,    BBOCB(16,BOF,CBLT,0,1)},
  "bnla-",        { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOF,CBLT,1,0)},
  "bnla+",        { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOF,CBLT,1,0)},
  "bnla",         { CR, BDA }           ,{COM,    BBOCB(16,BOF,CBLT,1,0)},
  "bnlla-",       { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOF,CBLT,1,1)},
  "bnlla+",       { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOF,CBLT,1,1)},
  "bnlla",        { CR, BDA }           ,{COM,    BBOCB(16,BOF,CBLT,1,1)},
  "ble-",         { CR, BDM }           ,{PPCCOM, BBOCB(16,BOF,CBGT,0,0)},
  "ble+",         { CR, BDP }           ,{PPCCOM, BBOCB(16,BOF,CBGT,0,0)},
  "ble",          { CR, BD }            ,{COM,    BBOCB(16,BOF,CBGT,0,0)},
  "blel-",        { CR, BDM }           ,{PPCCOM, BBOCB(16,BOF,CBGT,0,1)},
  "blel+",        { CR, BDP }           ,{PPCCOM, BBOCB(16,BOF,CBGT,0,1)},
  "blel",         { CR, BD }            ,{COM,    BBOCB(16,BOF,CBGT,0,1)},
  "blea-",        { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOF,CBGT,1,0)},
  "blea+",        { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOF,CBGT,1,0)},
  "blea",         { CR, BDA }           ,{COM,    BBOCB(16,BOF,CBGT,1,0)},
  "blela-",       { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOF,CBGT,1,1)},
  "blela+",       { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOF,CBGT,1,1)},
  "blela",        { CR, BDA }           ,{COM,    BBOCB(16,BOF,CBGT,1,1)},
  "bng-",         { CR, BDM }           ,{PPCCOM, BBOCB(16,BOF,CBGT,0,0)},
  "bng+",         { CR, BDP }           ,{PPCCOM, BBOCB(16,BOF,CBGT,0,0)},
  "bng",          { CR, BD }            ,{COM,    BBOCB(16,BOF,CBGT,0,0)},
  "bngl-",        { CR, BDM }           ,{PPCCOM, BBOCB(16,BOF,CBGT,0,1)},
  "bngl+",        { CR, BDP }           ,{PPCCOM, BBOCB(16,BOF,CBGT,0,1)},
  "bngl",         { CR, BD }            ,{COM,    BBOCB(16,BOF,CBGT,0,1)},
  "bnga-",        { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOF,CBGT,1,0)},
  "bnga+",        { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOF,CBGT,1,0)},
  "bnga",         { CR, BDA }           ,{COM,    BBOCB(16,BOF,CBGT,1,0)},
  "bngla-",       { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOF,CBGT,1,1)},
  "bngla+",       { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOF,CBGT,1,1)},
  "bngla",        { CR, BDA }           ,{COM,    BBOCB(16,BOF,CBGT,1,1)},
  "bne-",         { CR, BDM }           ,{PPCCOM, BBOCB(16,BOF,CBEQ,0,0)},
  "bne+",         { CR, BDP }           ,{PPCCOM, BBOCB(16,BOF,CBEQ,0,0)},
  "bne",          { CR, BD }            ,{COM,    BBOCB(16,BOF,CBEQ,0,0)},
  "bnel-",        { CR, BDM }           ,{PPCCOM, BBOCB(16,BOF,CBEQ,0,1)},
  "bnel+",        { CR, BDP }           ,{PPCCOM, BBOCB(16,BOF,CBEQ,0,1)},
  "bnel",         { CR, BD }            ,{COM,    BBOCB(16,BOF,CBEQ,0,1)},
  "bnea-",        { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOF,CBEQ,1,0)},
  "bnea+",        { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOF,CBEQ,1,0)},
  "bnea",         { CR, BDA }           ,{COM,    BBOCB(16,BOF,CBEQ,1,0)},
  "bnela-",       { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOF,CBEQ,1,1)},
  "bnela+",       { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOF,CBEQ,1,1)},
  "bnela",        { CR, BDA }           ,{COM,    BBOCB(16,BOF,CBEQ,1,1)},
  "bns-",         { CR, BDM }           ,{PPCCOM, BBOCB(16,BOF,CBSO,0,0)},
  "bns+",         { CR, BDP }           ,{PPCCOM, BBOCB(16,BOF,CBSO,0,0)},
  "bns",          { CR, BD }            ,{COM,    BBOCB(16,BOF,CBSO,0,0)},
  "bnsl-",        { CR, BDM }           ,{PPCCOM, BBOCB(16,BOF,CBSO,0,1)},
  "bnsl+",        { CR, BDP }           ,{PPCCOM, BBOCB(16,BOF,CBSO,0,1)},
  "bnsl",         { CR, BD }            ,{COM,    BBOCB(16,BOF,CBSO,0,1)},
  "bnsa-",        { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOF,CBSO,1,0)},
  "bnsa+",        { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOF,CBSO,1,0)},
  "bnsa",         { CR, BDA }           ,{COM,    BBOCB(16,BOF,CBSO,1,0)},
  "bnsla-",       { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOF,CBSO,1,1)},
  "bnsla+",       { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOF,CBSO,1,1)},
  "bnsla",        { CR, BDA }           ,{COM,    BBOCB(16,BOF,CBSO,1,1)},
  "bnu-",         { CR, BDM }           ,{PPCCOM, BBOCB(16,BOF,CBSO,0,0)},
  "bnu+",         { CR, BDP }           ,{PPCCOM, BBOCB(16,BOF,CBSO,0,0)},
  "bnu",          { CR, BD }            ,{PPCCOM, BBOCB(16,BOF,CBSO,0,0)},
  "bnul-",        { CR, BDM }           ,{PPCCOM, BBOCB(16,BOF,CBSO,0,1)},
  "bnul+",        { CR, BDP }           ,{PPCCOM, BBOCB(16,BOF,CBSO,0,1)},
  "bnul",         { CR, BD }            ,{PPCCOM, BBOCB(16,BOF,CBSO,0,1)},
  "bnua-",        { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOF,CBSO,1,0)},
  "bnua+",        { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOF,CBSO,1,0)},
  "bnua",         { CR, BDA }           ,{PPCCOM, BBOCB(16,BOF,CBSO,1,0)},
  "bnula-",       { CR, BDMA }          ,{PPCCOM, BBOCB(16,BOF,CBSO,1,1)},
  "bnula+",       { CR, BDPA }          ,{PPCCOM, BBOCB(16,BOF,CBSO,1,1)},
  "bnula",        { CR, BDA }           ,{PPCCOM, BBOCB(16,BOF,CBSO,1,1)},
  "bdnzt-",       { BI, BDM }           ,{PPCCOM, BBO(16,BODNZT,0,0)},
  "bdnzt+",       { BI, BDP }           ,{PPCCOM, BBO(16,BODNZT,0,0)},
  "bdnzt",        { BI, BD }            ,{PPCCOM, BBO(16,BODNZT,0,0)},
  "bdnztl-",      { BI, BDM }           ,{PPCCOM, BBO(16,BODNZT,0,1)},
  "bdnztl+",      { BI, BDP }           ,{PPCCOM, BBO(16,BODNZT,0,1)},
  "bdnztl",       { BI, BD }            ,{PPCCOM, BBO(16,BODNZT,0,1)},
  "bdnzta-",      { BI, BDMA }          ,{PPCCOM, BBO(16,BODNZT,1,0)},
  "bdnzta+",      { BI, BDPA }          ,{PPCCOM, BBO(16,BODNZT,1,0)},
  "bdnzta",       { BI, BDA }           ,{PPCCOM, BBO(16,BODNZT,1,0)},
  "bdnztla-",     { BI, BDMA }          ,{PPCCOM, BBO(16,BODNZT,1,1)},
  "bdnztla+",     { BI, BDPA }          ,{PPCCOM, BBO(16,BODNZT,1,1)},
  "bdnztla",      { BI, BDA }           ,{PPCCOM, BBO(16,BODNZT,1,1)},
  "bdnzf-",       { BI, BDM }           ,{PPCCOM, BBO(16,BODNZF,0,0)},
  "bdnzf+",       { BI, BDP }           ,{PPCCOM, BBO(16,BODNZF,0,0)},
  "bdnzf",        { BI, BD }            ,{PPCCOM, BBO(16,BODNZF,0,0)},
  "bdnzfl-",      { BI, BDM }           ,{PPCCOM, BBO(16,BODNZF,0,1)},
  "bdnzfl+",      { BI, BDP }           ,{PPCCOM, BBO(16,BODNZF,0,1)},
  "bdnzfl",       { BI, BD }            ,{PPCCOM, BBO(16,BODNZF,0,1)},
  "bdnzfa-",      { BI, BDMA }          ,{PPCCOM, BBO(16,BODNZF,1,0)},
  "bdnzfa+",      { BI, BDPA }          ,{PPCCOM, BBO(16,BODNZF,1,0)},
  "bdnzfa",       { BI, BDA }           ,{PPCCOM, BBO(16,BODNZF,1,0)},
  "bdnzfla-",     { BI, BDMA }          ,{PPCCOM, BBO(16,BODNZF,1,1)},
  "bdnzfla+",     { BI, BDPA }          ,{PPCCOM, BBO(16,BODNZF,1,1)},
  "bdnzfla",      { BI, BDA }           ,{PPCCOM, BBO(16,BODNZF,1,1)},
  "bt-",          { BI, BDM }           ,{PPCCOM, BBO(16,BOT,0,0)},
  "bt+",          { BI, BDP }           ,{PPCCOM, BBO(16,BOT,0,0)},
  "bt",           { BI, BD }            ,{PPCCOM, BBO(16,BOT,0,0)},
  "bbt",          { BI, BD }            ,{PWRCOM, BBO(16,BOT,0,0)},
  "btl-",         { BI, BDM }           ,{PPCCOM, BBO(16,BOT,0,1)},
  "btl+",         { BI, BDP }           ,{PPCCOM, BBO(16,BOT,0,1)},
  "btl",          { BI, BD }            ,{PPCCOM, BBO(16,BOT,0,1)},
  "bbtl",         { BI, BD }            ,{PWRCOM, BBO(16,BOT,0,1)},
  "bta-",         { BI, BDMA }          ,{PPCCOM, BBO(16,BOT,1,0)},
  "bta+",         { BI, BDPA }          ,{PPCCOM, BBO(16,BOT,1,0)},
  "bta",          { BI, BDA }           ,{PPCCOM, BBO(16,BOT,1,0)},
  "bbta",         { BI, BDA }           ,{PWRCOM, BBO(16,BOT,1,0)},
  "btla-",        { BI, BDMA }          ,{PPCCOM, BBO(16,BOT,1,1)},
  "btla+",        { BI, BDPA }          ,{PPCCOM, BBO(16,BOT,1,1)},
  "btla",         { BI, BDA }           ,{PPCCOM, BBO(16,BOT,1,1)},
  "bbtla",        { BI, BDA }           ,{PWRCOM, BBO(16,BOT,1,1)},
  "bf-",          { BI, BDM }           ,{PPCCOM, BBO(16,BOF,0,0)},
  "bf+",          { BI, BDP }           ,{PPCCOM, BBO(16,BOF,0,0)},
  "bf",           { BI, BD }            ,{PPCCOM, BBO(16,BOF,0,0)},
  "bbf",          { BI, BD }            ,{PWRCOM, BBO(16,BOF,0,0)},
  "bfl-",         { BI, BDM }           ,{PPCCOM, BBO(16,BOF,0,1)},
  "bfl+",         { BI, BDP }           ,{PPCCOM, BBO(16,BOF,0,1)},
  "bfl",          { BI, BD }            ,{PPCCOM, BBO(16,BOF,0,1)},
  "bbfl",         { BI, BD }            ,{PWRCOM, BBO(16,BOF,0,1)},
  "bfa-",         { BI, BDMA }          ,{PPCCOM, BBO(16,BOF,1,0)},
  "bfa+",         { BI, BDPA }          ,{PPCCOM, BBO(16,BOF,1,0)},
  "bfa",          { BI, BDA }           ,{PPCCOM, BBO(16,BOF,1,0)},
  "bbfa",         { BI, BDA }           ,{PWRCOM, BBO(16,BOF,1,0)},
  "bfla-",        { BI, BDMA }          ,{PPCCOM, BBO(16,BOF,1,1)},
  "bfla+",        { BI, BDPA }          ,{PPCCOM, BBO(16,BOF,1,1)},
  "bfla",         { BI, BDA }           ,{PPCCOM, BBO(16,BOF,1,1)},
  "bbfla",        { BI, BDA }           ,{PWRCOM, BBO(16,BOF,1,1)},
  "bdzt-",        { BI, BDM }           ,{PPCCOM, BBO(16,BODZT,0,0)},
  "bdzt+",        { BI, BDP }           ,{PPCCOM, BBO(16,BODZT,0,0)},
  "bdzt",         { BI, BD }            ,{PPCCOM, BBO(16,BODZT,0,0)},
  "bdztl-",       { BI, BDM }           ,{PPCCOM, BBO(16,BODZT,0,1)},
  "bdztl+",       { BI, BDP }           ,{PPCCOM, BBO(16,BODZT,0,1)},
  "bdztl",        { BI, BD }            ,{PPCCOM, BBO(16,BODZT,0,1)},
  "bdzta-",       { BI, BDMA }          ,{PPCCOM, BBO(16,BODZT,1,0)},
  "bdzta+",       { BI, BDPA }          ,{PPCCOM, BBO(16,BODZT,1,0)},
  "bdzta",        { BI, BDA }           ,{PPCCOM, BBO(16,BODZT,1,0)},
  "bdztla-",      { BI, BDMA }          ,{PPCCOM, BBO(16,BODZT,1,1)},
  "bdztla+",      { BI, BDPA }          ,{PPCCOM, BBO(16,BODZT,1,1)},
  "bdztla",       { BI, BDA }           ,{PPCCOM, BBO(16,BODZT,1,1)},
  "bdzf-",        { BI, BDM }           ,{PPCCOM, BBO(16,BODZF,0,0)},
  "bdzf+",        { BI, BDP }           ,{PPCCOM, BBO(16,BODZF,0,0)},
  "bdzf",         { BI, BD }            ,{PPCCOM, BBO(16,BODZF,0,0)},
  "bdzfl-",       { BI, BDM }           ,{PPCCOM, BBO(16,BODZF,0,1)},
  "bdzfl+",       { BI, BDP }           ,{PPCCOM, BBO(16,BODZF,0,1)},
  "bdzfl",        { BI, BD }            ,{PPCCOM, BBO(16,BODZF,0,1)},
  "bdzfa-",       { BI, BDMA }          ,{PPCCOM, BBO(16,BODZF,1,0)},
  "bdzfa+",       { BI, BDPA }          ,{PPCCOM, BBO(16,BODZF,1,0)},
  "bdzfa",        { BI, BDA }           ,{PPCCOM, BBO(16,BODZF,1,0)},
  "bdzfla-",      { BI, BDMA }          ,{PPCCOM, BBO(16,BODZF,1,1)},
  "bdzfla+",      { BI, BDPA }          ,{PPCCOM, BBO(16,BODZF,1,1)},
  "bdzfla",       { BI, BDA }           ,{PPCCOM, BBO(16,BODZF,1,1)},
  "bc-",          { BOE, BI, BDM }      ,{PPCCOM, B(16,0,0)},
  "bc+",          { BOE, BI, BDP }      ,{PPCCOM, B(16,0,0)},
  "bc",           { BO, BI, BD }        ,{COM,    B(16,0,0)},
  "bcl-",         { BOE, BI, BDM }      ,{PPCCOM, B(16,0,1)},
  "bcl+",         { BOE, BI, BDP }      ,{PPCCOM, B(16,0,1)},
  "bcl",          { BO, BI, BD }        ,{COM,    B(16,0,1)},
  "bca-",         { BOE, BI, BDMA }     ,{PPCCOM, B(16,1,0)},
  "bca+",         { BOE, BI, BDPA }     ,{PPCCOM, B(16,1,0)},
  "bca",          { BO, BI, BDA }       ,{COM,    B(16,1,0)},
  "bcla-",        { BOE, BI, BDMA }     ,{PPCCOM, B(16,1,1)},
  "bcla+",        { BOE, BI, BDPA }     ,{PPCCOM, B(16,1,1)},
  "bcla",         { BO, BI, BDA }       ,{COM,    B(16,1,1)},

  "sc",           { 0 }                 ,{PPC,    SC(17,1,0)},
  "svc",          { LEV, FL1, FL2 }     ,{POWER,  SC(17,0,0)},
  "svcl",         { LEV, FL1, FL2 }     ,{POWER,  SC(17,0,1)},
  "svca",         { SV }                ,{PWRCOM, SC(17,1,0)},
  "svcla",        { SV }                ,{POWER,  SC(17,1,1)},

  "b",            { LI }                ,{COM,    B(18,0,0)},
  "bl",           { LI }                ,{COM,    B(18,0,1)},
  "ba",           { LIA }               ,{COM,    B(18,1,0)},
  "bla",          { LIA }               ,{COM,    B(18,1,1)},

  "mcrf",         { BF, BFA }           ,{COM,    XL(19,0)},

  "blr",          { 0 }                 ,{PPCCOM, XLO(19,BOU,16,0)},
  "br",           { 0 }                 ,{PWRCOM, XLO(19,BOU,16,0)},
  "blrl",         { 0 }                 ,{PPCCOM, XLO(19,BOU,16,1)},
  "brl",          { 0 }                 ,{PWRCOM, XLO(19,BOU,16,1)},
  "bdnzlr",       { 0 }                 ,{PPCCOM, XLO(19,BODNZ,16,0)},
  "bdnzlr-",      { 0 }                 ,{PPCCOM, XLO(19,BODNZ,16,0)},
  "bdnzlr+",      { 0 }                 ,{PPCCOM, XLO(19,BODNZP,16,0)},
  "bdnzlrl",      { 0 }                 ,{PPCCOM, XLO(19,BODNZ,16,1)},
  "bdnzlrl-",     { 0 }                 ,{PPCCOM, XLO(19,BODNZ,16,1)},
  "bdnzlrl+",     { 0 }                 ,{PPCCOM, XLO(19,BODNZP,16,1)},
  "bdzlr",        { 0 }                 ,{PPCCOM, XLO(19,BODZ,16,0)},
  "bdzlr-",       { 0 }                 ,{PPCCOM, XLO(19,BODZ,16,0)},
  "bdzlr+",       { 0 }                 ,{PPCCOM, XLO(19,BODZP,16,0)},
  "bdzlrl",       { 0 }                 ,{PPCCOM, XLO(19,BODZ,16,1)},
  "bdzlrl-",      { 0 }                 ,{PPCCOM, XLO(19,BODZ,16,1)},
  "bdzlrl+",      { 0 }                 ,{PPCCOM, XLO(19,BODZP,16,1)},
  "bltlr",        { CR }                ,{PPCCOM, XLOCB(19,BOT,CBLT,16,0)},
  "bltlr-",       { CR }                ,{PPCCOM, XLOCB(19,BOT,CBLT,16,0)},
  "bltlr+",       { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBLT,16,0)},
  "bltr",         { CR }                ,{PWRCOM, XLOCB(19,BOT,CBLT,16,0)},
  "bltlrl",       { CR }                ,{PPCCOM, XLOCB(19,BOT,CBLT,16,1)},
  "bltlrl-",      { CR }                ,{PPCCOM, XLOCB(19,BOT,CBLT,16,1)},
  "bltlrl+",      { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBLT,16,1)},
  "bltrl",        { CR }                ,{PWRCOM, XLOCB(19,BOT,CBLT,16,1)},
  "bgtlr",        { CR }                ,{PPCCOM, XLOCB(19,BOT,CBGT,16,0)},
  "bgtlr-",       { CR }                ,{PPCCOM, XLOCB(19,BOT,CBGT,16,0)},
  "bgtlr+",       { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBGT,16,0)},
  "bgtr",         { CR }                ,{PWRCOM, XLOCB(19,BOT,CBGT,16,0)},
  "bgtlrl",       { CR }                ,{PPCCOM, XLOCB(19,BOT,CBGT,16,1)},
  "bgtlrl-",      { CR }                ,{PPCCOM, XLOCB(19,BOT,CBGT,16,1)},
  "bgtlrl+",      { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBGT,16,1)},
  "bgtrl",        { CR }                ,{PWRCOM, XLOCB(19,BOT,CBGT,16,1)},
  "beqlr",        { CR }                ,{PPCCOM, XLOCB(19,BOT,CBEQ,16,0)},
  "beqlr-",       { CR }                ,{PPCCOM, XLOCB(19,BOT,CBEQ,16,0)},
  "beqlr+",       { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBEQ,16,0)},
  "beqr",         { CR }                ,{PWRCOM, XLOCB(19,BOT,CBEQ,16,0)},
  "beqlrl",       { CR }                ,{PPCCOM, XLOCB(19,BOT,CBEQ,16,1)},
  "beqlrl-",      { CR }                ,{PPCCOM, XLOCB(19,BOT,CBEQ,16,1)},
  "beqlrl+",      { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBEQ,16,1)},
  "beqrl",        { CR }                ,{PWRCOM, XLOCB(19,BOT,CBEQ,16,1)},
  "bsolr",        { CR }                ,{PPCCOM, XLOCB(19,BOT,CBSO,16,0)},
  "bsolr-",       { CR }                ,{PPCCOM, XLOCB(19,BOT,CBSO,16,0)},
  "bsolr+",       { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBSO,16,0)},
  "bsor",         { CR }                ,{PWRCOM, XLOCB(19,BOT,CBSO,16,0)},
  "bsolrl",       { CR }                ,{PPCCOM, XLOCB(19,BOT,CBSO,16,1)},
  "bsolrl-",      { CR }                ,{PPCCOM, XLOCB(19,BOT,CBSO,16,1)},
  "bsolrl+",      { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBSO,16,1)},
  "bsorl",        { CR }                ,{PWRCOM, XLOCB(19,BOT,CBSO,16,1)},
  "bunlr",        { CR }                ,{PPCCOM, XLOCB(19,BOT,CBSO,16,0)},
  "bunlr-",       { CR }                ,{PPCCOM, XLOCB(19,BOT,CBSO,16,0)},
  "bunlr+",       { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBSO,16,0)},
  "bunlrl",       { CR }                ,{PPCCOM, XLOCB(19,BOT,CBSO,16,1)},
  "bunlrl-",      { CR }                ,{PPCCOM, XLOCB(19,BOT,CBSO,16,1)},
  "bunlrl+",      { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBSO,16,1)},
  "bgelr",        { CR }                ,{PPCCOM, XLOCB(19,BOF,CBLT,16,0)},
  "bgelr-",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBLT,16,0)},
  "bgelr+",       { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBLT,16,0)},
  "bger",         { CR }                ,{PWRCOM, XLOCB(19,BOF,CBLT,16,0)},
  "bgelrl",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBLT,16,1)},
  "bgelrl-",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBLT,16,1)},
  "bgelrl+",      { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBLT,16,1)},
  "bgerl",        { CR }                ,{PWRCOM, XLOCB(19,BOF,CBLT,16,1)},
  "bnllr",        { CR }                ,{PPCCOM, XLOCB(19,BOF,CBLT,16,0)},
  "bnllr-",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBLT,16,0)},
  "bnllr+",       { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBLT,16,0)},
  "bnlr",         { CR }                ,{PWRCOM, XLOCB(19,BOF,CBLT,16,0)},
  "bnllrl",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBLT,16,1)},
  "bnllrl-",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBLT,16,1)},
  "bnllrl+",      { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBLT,16,1)},
  "bnlrl",        { CR }                ,{PWRCOM, XLOCB(19,BOF,CBLT,16,1)},
  "blelr",        { CR }                ,{PPCCOM, XLOCB(19,BOF,CBGT,16,0)},
  "blelr-",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBGT,16,0)},
  "blelr+",       { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBGT,16,0)},
  "bler",         { CR }                ,{PWRCOM, XLOCB(19,BOF,CBGT,16,0)},
  "blelrl",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBGT,16,1)},
  "blelrl-",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBGT,16,1)},
  "blelrl+",      { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBGT,16,1)},
  "blerl",        { CR }                ,{PWRCOM, XLOCB(19,BOF,CBGT,16,1)},
  "bnglr",        { CR }                ,{PPCCOM, XLOCB(19,BOF,CBGT,16,0)},
  "bnglr-",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBGT,16,0)},
  "bnglr+",       { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBGT,16,0)},
  "bngr",         { CR }                ,{PWRCOM, XLOCB(19,BOF,CBGT,16,0)},
  "bnglrl",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBGT,16,1)},
  "bnglrl-",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBGT,16,1)},
  "bnglrl+",      { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBGT,16,1)},
  "bngrl",        { CR }                ,{PWRCOM, XLOCB(19,BOF,CBGT,16,1)},
  "bnelr",        { CR }                ,{PPCCOM, XLOCB(19,BOF,CBEQ,16,0)},
  "bnelr-",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBEQ,16,0)},
  "bnelr+",       { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBEQ,16,0)},
  "bner",         { CR }                ,{PWRCOM, XLOCB(19,BOF,CBEQ,16,0)},
  "bnelrl",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBEQ,16,1)},
  "bnelrl-",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBEQ,16,1)},
  "bnelrl+",      { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBEQ,16,1)},
  "bnerl",        { CR }                ,{PWRCOM, XLOCB(19,BOF,CBEQ,16,1)},
  "bnslr",        { CR }                ,{PPCCOM, XLOCB(19,BOF,CBSO,16,0)},
  "bnslr-",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBSO,16,0)},
  "bnslr+",       { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBSO,16,0)},
  "bnsr",         { CR }                ,{PWRCOM, XLOCB(19,BOF,CBSO,16,0)},
  "bnslrl",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBSO,16,1)},
  "bnslrl-",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBSO,16,1)},
  "bnslrl+",      { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBSO,16,1)},
  "bnsrl",        { CR }                ,{PWRCOM, XLOCB(19,BOF,CBSO,16,1)},
  "bnulr",        { CR }                ,{PPCCOM, XLOCB(19,BOF,CBSO,16,0)},
  "bnulr-",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBSO,16,0)},
  "bnulr+",       { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBSO,16,0)},
  "bnulrl",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBSO,16,1)},
  "bnulrl-",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBSO,16,1)},
  "bnulrl+",      { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBSO,16,1)},
  "btlr",         { BI }                ,{PPCCOM, XLO(19,BOT,16,0)},
  "btlr-",        { BI }                ,{PPCCOM, XLO(19,BOT,16,0)},
  "btlr+",        { BI }                ,{PPCCOM, XLO(19,BOTP,16,0)},
  "bbtr",         { BI }                ,{PWRCOM, XLO(19,BOT,16,0)},
  "btlrl",        { BI }                ,{PPCCOM, XLO(19,BOT,16,1)},
  "btlrl-",       { BI }                ,{PPCCOM, XLO(19,BOT,16,1)},
  "btlrl+",       { BI }                ,{PPCCOM, XLO(19,BOTP,16,1)},
  "bbtrl",        { BI }                ,{PWRCOM, XLO(19,BOT,16,1)},
  "bflr",         { BI }                ,{PPCCOM, XLO(19,BOF,16,0)},
  "bflr-",        { BI }                ,{PPCCOM, XLO(19,BOF,16,0)},
  "bflr+",        { BI }                ,{PPCCOM, XLO(19,BOFP,16,0)},
  "bbfr",         { BI }                ,{PWRCOM, XLO(19,BOF,16,0)},
  "bflrl",        { BI }                ,{PPCCOM, XLO(19,BOF,16,1)},
  "bflrl-",       { BI }                ,{PPCCOM, XLO(19,BOF,16,1)},
  "bflrl+",       { BI }                ,{PPCCOM, XLO(19,BOFP,16,1)},
  "bbfrl",        { BI }                ,{PWRCOM, XLO(19,BOF,16,1)},
  "bdnztlr",      { BI }                ,{PPCCOM, XLO(19,BODNZT,16,0)},
  "bdnztlr-",     { BI }                ,{PPCCOM, XLO(19,BODNZT,16,0)},
  "bdnztlr+",     { BI }                ,{PPCCOM, XLO(19,BODNZTP,16,0)},
  "bdnztlrl",     { BI }                ,{PPCCOM, XLO(19,BODNZT,16,1)},
  "bdnztlrl-",    { BI }                ,{PPCCOM, XLO(19,BODNZT,16,1)},
  "bdnztlrl+",    { BI }                ,{PPCCOM, XLO(19,BODNZTP,16,1)},
  "bdnzflr",      { BI }                ,{PPCCOM, XLO(19,BODNZF,16,0)},
  "bdnzflr-",     { BI }                ,{PPCCOM, XLO(19,BODNZF,16,0)},
  "bdnzflr+",     { BI }                ,{PPCCOM, XLO(19,BODNZFP,16,0)},
  "bdnzflrl",     { BI }                ,{PPCCOM, XLO(19,BODNZF,16,1)},
  "bdnzflrl-",    { BI }                ,{PPCCOM, XLO(19,BODNZF,16,1)},
  "bdnzflrl+",    { BI }                ,{PPCCOM, XLO(19,BODNZFP,16,1)},
  "bdztlr",       { BI }                ,{PPCCOM, XLO(19,BODZT,16,0)},
  "bdztlr-",      { BI }                ,{PPCCOM, XLO(19,BODZT,16,0)},
  "bdztlr+",      { BI }                ,{PPCCOM, XLO(19,BODZTP,16,0)},
  "bdztlrl",      { BI }                ,{PPCCOM, XLO(19,BODZT,16,1)},
  "bdztlrl-",     { BI }                ,{PPCCOM, XLO(19,BODZT,16,1)},
  "bdztlrl+",     { BI }                ,{PPCCOM, XLO(19,BODZTP,16,1)},
  "bdzflr",       { BI }                ,{PPCCOM, XLO(19,BODZF,16,0)},
  "bdzflr-",      { BI }                ,{PPCCOM, XLO(19,BODZF,16,0)},
  "bdzflr+",      { BI }                ,{PPCCOM, XLO(19,BODZFP,16,0)},
  "bdzflrl",      { BI }                ,{PPCCOM, XLO(19,BODZF,16,1)},
  "bdzflrl-",     { BI }                ,{PPCCOM, XLO(19,BODZF,16,1)},
  "bdzflrl+",     { BI }                ,{PPCCOM, XLO(19,BODZFP,16,1)},
  "bclr",         { BO, BI }            ,{PPCCOM, XLLK(19,16,0)},
  "bclrl",        { BO, BI }            ,{PPCCOM, XLLK(19,16,1)},
  "bclr+",        { BOE, BI }           ,{PPCCOM, XLYLK(19,16,1,0)},
  "bclrl+",       { BOE, BI }           ,{PPCCOM, XLYLK(19,16,1,1)},
  "bclr-",        { BOE, BI }           ,{PPCCOM, XLYLK(19,16,0,0)},
  "bclrl-",       { BOE, BI }           ,{PPCCOM, XLYLK(19,16,0,1)},
  "bcr",          { BO, BI }            ,{PWRCOM, XLLK(19,16,0)},
  "bcrl",         { BO, BI }            ,{PWRCOM, XLLK(19,16,1)},

  "rfid",         { 0 }                 ,{PPC64,  XL(19,18)},

  "crnot",        { BT, BA, BBA }       ,{PPCCOM, XL(19,33)},
  "crnor",        { BT, BA, BB }        ,{COM,    XL(19,33)},

  "rfmci",        { 0 }                 ,{RFMC476,X(19,38)},
  "rfi",          { 0 }                 ,{COM,    XL(19,50)},
  "rfci",         { 0 }                 ,{BE3403, XL(19,51)},
  "rfsvc",        { 0 }                 ,{POWER,  XL(19,82)},

  "crandc",       { BT, BA, BB }        ,{COM,    XL(19,129)},

  "isync",        { 0 }                 ,{PPCCOM, XL(19,150)},
  "ics",          { 0 }                 ,{PWRCOM, XL(19,150)},

  "crclr",        { BT, BAT, BBA }      ,{PPCCOM, XL(19,193)},
  "crxor",        { BT, BA, BB }        ,{COM,    XL(19,193)},

  "crnand",       { BT, BA, BB }        ,{COM,    XL(19,225)},

  "crand",        { BT, BA, BB }        ,{COM,    XL(19,257)},

  "crset",        { BT, BAT, BBA }      ,{PPCCOM, XL(19,289)},
  "creqv",        { BT, BA, BB }        ,{COM,    XL(19,289)},

  "crorc",        { BT, BA, BB }        ,{COM,    XL(19,417)},

  "crmove",       { BT, BA, BBA }       ,{PPCCOM, XL(19,449)},
  "cror",         { BT, BA, BB }        ,{COM,    XL(19,449)},

  "bctr",         { 0 }                 ,{COM,    XLO(19,BOU,528,0)},
  "bctrl",        { 0 }                 ,{COM,    XLO(19,BOU,528,1)},
  "bltctr",       { CR }                ,{PPCCOM, XLOCB(19,BOT,CBLT,528,0)},
  "bltctr-",      { CR }                ,{PPCCOM, XLOCB(19,BOT,CBLT,528,0)},
  "bltctr+",      { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBLT,528,0)},
  "bltctrl",      { CR }                ,{PPCCOM, XLOCB(19,BOT,CBLT,528,1)},
  "bltctrl-",     { CR }                ,{PPCCOM, XLOCB(19,BOT,CBLT,528,1)},
  "bltctrl+",     { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBLT,528,1)},
  "bgtctr",       { CR }                ,{PPCCOM, XLOCB(19,BOT,CBGT,528,0)},
  "bgtctr-",      { CR }                ,{PPCCOM, XLOCB(19,BOT,CBGT,528,0)},
  "bgtctr+",      { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBGT,528,0)},
  "bgtctrl",      { CR }                ,{PPCCOM, XLOCB(19,BOT,CBGT,528,1)},
  "bgtctrl-",     { CR }                ,{PPCCOM, XLOCB(19,BOT,CBGT,528,1)},
  "bgtctrl+",     { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBGT,528,1)},
  "beqctr",       { CR }                ,{PPCCOM, XLOCB(19,BOT,CBEQ,528,0)},
  "beqctr-",      { CR }                ,{PPCCOM, XLOCB(19,BOT,CBEQ,528,0)},
  "beqctr+",      { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBEQ,528,0)},
  "beqctrl",      { CR }                ,{PPCCOM, XLOCB(19,BOT,CBEQ,528,1)},
  "beqctrl-",     { CR }                ,{PPCCOM, XLOCB(19,BOT,CBEQ,528,1)},
  "beqctrl+",     { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBEQ,528,1)},
  "bsoctr",       { CR }                ,{PPCCOM, XLOCB(19,BOT,CBSO,528,0)},
  "bsoctr-",      { CR }                ,{PPCCOM, XLOCB(19,BOT,CBSO,528,0)},
  "bsoctr+",      { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBSO,528,0)},
  "bsoctrl",      { CR }                ,{PPCCOM, XLOCB(19,BOT,CBSO,528,1)},
  "bsoctrl-",     { CR }                ,{PPCCOM, XLOCB(19,BOT,CBSO,528,1)},
  "bsoctrl+",     { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBSO,528,1)},
  "bunctr",       { CR }                ,{PPCCOM, XLOCB(19,BOT,CBSO,528,0)},
  "bunctr-",      { CR }                ,{PPCCOM, XLOCB(19,BOT,CBSO,528,0)},
  "bunctr+",      { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBSO,528,0)},
  "bunctrl",      { CR }                ,{PPCCOM, XLOCB(19,BOT,CBSO,528,1)},
  "bunctrl-",     { CR }                ,{PPCCOM, XLOCB(19,BOT,CBSO,528,1)},
  "bunctrl+",     { CR }                ,{PPCCOM, XLOCB(19,BOTP,CBSO,528,1)},
  "bgectr",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBLT,528,0)},
  "bgectr-",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBLT,528,0)},
  "bgectr+",      { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBLT,528,0)},
  "bgectrl",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBLT,528,1)},
  "bgectrl-",     { CR }                ,{PPCCOM, XLOCB(19,BOF,CBLT,528,1)},
  "bgectrl+",     { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBLT,528,1)},
  "bnlctr",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBLT,528,0)},
  "bnlctr-",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBLT,528,0)},
  "bnlctr+",      { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBLT,528,0)},
  "bnlctrl",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBLT,528,1)},
  "bnlctrl-",     { CR }                ,{PPCCOM, XLOCB(19,BOF,CBLT,528,1)},
  "bnlctrl+",     { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBLT,528,1)},
  "blectr",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBGT,528,0)},
  "blectr-",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBGT,528,0)},
  "blectr+",      { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBGT,528,0)},
  "blectrl",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBGT,528,1)},
  "blectrl-",     { CR }                ,{PPCCOM, XLOCB(19,BOF,CBGT,528,1)},
  "blectrl+",     { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBGT,528,1)},
  "bngctr",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBGT,528,0)},
  "bngctr-",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBGT,528,0)},
  "bngctr+",      { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBGT,528,0)},
  "bngctrl",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBGT,528,1)},
  "bngctrl-",     { CR }                ,{PPCCOM, XLOCB(19,BOF,CBGT,528,1)},
  "bngctrl+",     { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBGT,528,1)},
  "bnectr",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBEQ,528,0)},
  "bnectr-",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBEQ,528,0)},
  "bnectr+",      { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBEQ,528,0)},
  "bnectrl",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBEQ,528,1)},
  "bnectrl-",     { CR }                ,{PPCCOM, XLOCB(19,BOF,CBEQ,528,1)},
  "bnectrl+",     { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBEQ,528,1)},
  "bnsctr",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBSO,528,0)},
  "bnsctr-",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBSO,528,0)},
  "bnsctr+",      { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBSO,528,0)},
  "bnsctrl",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBSO,528,1)},
  "bnsctrl-",     { CR }                ,{PPCCOM, XLOCB(19,BOF,CBSO,528,1)},
  "bnsctrl+",     { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBSO,528,1)},
  "bnuctr",       { CR }                ,{PPCCOM, XLOCB(19,BOF,CBSO,528,0)},
  "bnuctr-",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBSO,528,0)},
  "bnuctr+",      { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBSO,528,0)},
  "bnuctrl",      { CR }                ,{PPCCOM, XLOCB(19,BOF,CBSO,528,1)},
  "bnuctrl-",     { CR }                ,{PPCCOM, XLOCB(19,BOF,CBSO,528,1)},
  "bnuctrl+",     { CR }                ,{PPCCOM, XLOCB(19,BOFP,CBSO,528,1)},
  "btctr",        { BI }                ,{PPCCOM, XLO(19,BOT,528,0)},
  "btctr-",       { BI }                ,{PPCCOM, XLO(19,BOT,528,0)},
  "btctr+",       { BI }                ,{PPCCOM, XLO(19,BOTP,528,0)},
  "btctrl",       { BI }                ,{PPCCOM, XLO(19,BOT,528,1)},
  "btctrl-",      { BI }                ,{PPCCOM, XLO(19,BOT,528,1)},
  "btctrl+",      { BI }                ,{PPCCOM, XLO(19,BOTP,528,1)},
  "bfctr",        { BI }                ,{PPCCOM, XLO(19,BOF,528,0)},
  "bfctr-",       { BI }                ,{PPCCOM, XLO(19,BOF,528,0)},
  "bfctr+",       { BI }                ,{PPCCOM, XLO(19,BOFP,528,0)},
  "bfctrl",       { BI }                ,{PPCCOM, XLO(19,BOF,528,1)},
  "bfctrl-",      { BI }                ,{PPCCOM, XLO(19,BOF,528,1)},
  "bfctrl+",      { BI }                ,{PPCCOM, XLO(19,BOFP,528,1)},
  "bcctr",        { BO, BI }            ,{PPCCOM, XLLK(19,528,0)},
  "bcctr-",       { BOE, BI }           ,{PPCCOM, XLYLK(19,528,0,0)},
  "bcctr+",       { BOE, BI }           ,{PPCCOM, XLYLK(19,528,1,0)},
  "bcctrl",       { BO, BI }            ,{PPCCOM, XLLK(19,528,1)},
  "bcctrl-",      { BOE, BI }           ,{PPCCOM, XLYLK(19,528,0,1)},
  "bcctrl+",      { BOE, BI }           ,{PPCCOM, XLYLK(19,528,1,1)},
  "bcc",          { BO, BI }            ,{PWRCOM, XLLK(19,528,0)},
  "bccl",         { BO, BI }            ,{PWRCOM, XLLK(19,528,1)},

  "rlwimi",       { RA,RS,SH,MBE,ME }   ,{PPCCOM, M(20,0)},
  "rlimi",        { RA,RS,SH,MBE,ME }   ,{PWRCOM, M(20,0)},

  "rlwimi.",      { RA,RS,SH,MBE,ME }   ,{PPCCOM, M(20,1)},
  "rlimi.",       { RA,RS,SH,MBE,ME }   ,{PWRCOM, M(20,1)},

  "rotlwi",       { RA, RS, SH }        ,{PPCCOM, MME(21,31,0)},
  "rotrwi",       { RA, RS, ROTRWI }    ,{PPCCOM, MME(21,31,0)},
  "clrlwi",       { RA, RS, MB }        ,{PPCCOM, MME(21,31,0)},
  "clrrwi",       { RA, RS, CLRRWI }    ,{PPCCOM, M(21,0)},
  "clrlslwi",     { RA, RS, MB, CLRLSL },{PPCCOM, M(21,0)},
  "slwi",         { RA, RS, SLWI }      ,{PPCCOM, M(21,0)},
  "srwi",         { RA, RS, SRWI }      ,{PPCCOM, M(21,0)},
  "extlwi",       { RA,RS,EXTLWI,EXTWIB},{PPCCOM, M(21,0)},
  "extrwi",       { RA,RS,EXTRWI,EXTWIB},{PPCCOM, M(21,0)},
  "inslwi",       { RA,RS,EXTLWI,INSLWI},{PPCCOM, M(20,0)},
  "insrwi",       { RA,RS,EXTLWI,INSRWI},{PPCCOM, M(20,0)},
  "rlwinm",       { RA,RS,SH,MBE,ME }   ,{PPCCOM, M(21,0)},
  "rlinm",        { RA,RS,SH,MBE,ME }   ,{PWRCOM, M(21,0)},
  "rotlwi.",      { RA,RS,SH }          ,{PPCCOM, MME(21,31,1)},
  "rotrwi.",      { RA, RS, ROTRWI }    ,{PPCCOM, MME(21,31,1)},
  "clrlwi.",      { RA, RS, MB }        ,{PPCCOM, MME(21,31,1)},
  "clrrwi.",      { RA, RS, CLRRWI }    ,{PPCCOM, M(21,1)},
  "clrlslwi.",    { RA, RS, MB, CLRLSL },{PPCCOM, M(21,1)},
  "slwi.",        { RA, RS, SLWI }      ,{PPCCOM, M(21,1)},
  "srwi.",        { RA, RS, SRWI }      ,{PPCCOM, M(21,1)},
  "extlwi.",      { RA,RS,EXTLWI,EXTWIB},{PPCCOM, M(21,1)},
  "extrwi.",      { RA,RS,EXTRWI,EXTWIB},{PPCCOM, M(21,1)},
  "inslwi.",      { RA,RS,EXTLWI,INSLWI},{PPCCOM, M(21,1)},
  "insrwi.",      { RA,RS,EXTLWI,INSRWI},{PPCCOM, M(21,1)},
  "rlwinm.",      { RA,RS,SH,MBE,ME }   ,{PPCCOM, M(21,1)},
  "rlinm.",       { RA,RS,SH,MBE,ME }   ,{PWRCOM, M(21,1)},

  "rlmi",         { RA,RS,RB,MBE,ME }   ,{M601,   M(22,0)},
  "rlmi.",        { RA,RS,RB,MBE,ME }   ,{M601,   M(22,1)},

  "rotlw",        { RA, RS, RB }        ,{PPCCOM, MME(23,31,0)},
  "rlwnm",        { RA,RS,RB,MBE,ME }   ,{PPCCOM, M(23,0)},
  "rlnm",         { RA,RS,RB,MBE,ME }   ,{PWRCOM, M(23,0)},
  "rotlw.",       { RA, RS, RB }        ,{PPCCOM, MME(23,31,1)},
  "rlwnm.",       { RA,RS,RB,MBE,ME }   ,{PPCCOM, M(23,1)},
  "rlnm.",        { RA,RS,RB,MBE,ME }   ,{PWRCOM, M(23,1)},

  "nop",          { 0 }                 ,{PPCCOM, OP(24)},
  "ori",          { RA, RS, UI }        ,{PPCCOM, OP(24)},
  "oril",         { RA, RS, UI }        ,{PWRCOM, OP(24)},

  "oris",         { RA, RS, UI }        ,{PPCCOM, OP(25)},
  "oriu",         { RA, RS, UI }        ,{PWRCOM, OP(25)},

  "xori",         { RA, RS, UI }        ,{PPCCOM, OP(26)},
  "xoril",        { RA, RS, UI }        ,{PWRCOM, OP(26)},

  "xoris",        { RA, RS, UI }        ,{PPCCOM, OP(27)},
  "xoriu",        { RA, RS, UI }        ,{PWRCOM, OP(27)},

  "andi.",        { RA, RS, UI }        ,{PPCCOM, OP(28)},
  "andil.",       { RA, RS, UI }        ,{PWRCOM, OP(28)},

  "andis.",       { RA, RS, UI }        ,{PPCCOM, OP(29)},
  "andiu.",       { RA, RS, UI }        ,{PWRCOM, OP(29)},

  "rotldi",       { RA, RS, SH6 }       ,{PPC64,  MD(30,0,0)},
  "clrldi",       { RA, RS, MB6 }       ,{PPC64,  MD(30,0,0)},
  "rldicl",       { RA, RS, SH6, MB6 }  ,{PPC64,  MD(30,0,0)},
  "rotldi.",      { RA, RS, SH6 }       ,{PPC64,  MD(30,0,1)},
  "clrldi.",      { RA, RS, MB6 }       ,{PPC64,  MD(30,0,1)},
  "rldicl.",      { RA, RS, SH6, MB6 }  ,{PPC64,  MD(30,0,1)},

  "rldicr",       { RA, RS, SH6, ME6 }  ,{PPC64,  MD(30,1,0)},
  "rldicr.",      { RA, RS, SH6, ME6 }  ,{PPC64,  MD(30,1,1)},

  "rldic",        { RA, RS, SH6, MB6 }  ,{PPC64,  MD(30,2,0)},
  "rldic.",       { RA, RS, SH6, MB6 }  ,{PPC64,  MD(30,2,1)},

  "rldimi",       { RA, RS, SH6, MB6 }  ,{PPC64,  MD(30,3,0)},
  "rldimi.",      { RA, RS, SH6, MB6 }  ,{PPC64,  MD(30,3,1)},

  "rotld",        { RA, RS, RB }        ,{PPC64,  MDS(30,8,0)},
  "rldcl",        { RA, RS, RB, MB6 }   ,{PPC64,  MDS(30,8,0)},
  "rotld.",       { RA, RS, RB }        ,{PPC64,  MDS(30,8,1)},
  "rldcl.",       { RA, RS, RB, MB6 }   ,{PPC64,  MDS(30,8,1)},

  "rldcr",        { RA, RS, RB, ME6 }   ,{PPC64,  MDS(30,9,0)},
  "rldcr.",       { RA, RS, RB, ME6 }   ,{PPC64,  MDS(30,9,1)},

  "cmpw",         { OBF, RA, RB }       ,{PPCCOM, XCMPL(31,0,0)},
  "cmpd",         { OBF, RA, RB }       ,{PPC64,  XCMPL(31,0,1)},
  "cmp",          { BF, L, RA, RB }     ,{PPCONLY,X(31,0)},
  "cmp",          { BF, RA, RB }        ,{PWRCOM, X(31,0)},

  "twlgt",        { RA, RB }            ,{PPCCOM, XTO(31,4,TOLGT)},
  "tlgt",         { RA, RB }            ,{PWRCOM, XTO(31,4,TOLGT)},
  "twllt",        { RA, RB }            ,{PPCCOM, XTO(31,4,TOLLT)},
  "tllt",         { RA, RB }            ,{PWRCOM, XTO(31,4,TOLLT)},
  "tweq",         { RA, RB }            ,{PPCCOM, XTO(31,4,TOEQ)},
  "teq",          { RA, RB }            ,{PWRCOM, XTO(31,4,TOEQ)},
  "twlge",        { RA, RB }            ,{PPCCOM, XTO(31,4,TOLGE)},
  "tlge",         { RA, RB }            ,{PWRCOM, XTO(31,4,TOLGE)},
  "twlnl",        { RA, RB }            ,{PPCCOM, XTO(31,4,TOLNL)},
  "tlnl",         { RA, RB }            ,{PWRCOM, XTO(31,4,TOLNL)},
  "twlle",        { RA, RB }            ,{PPCCOM, XTO(31,4,TOLLE)},
  "tlle",         { RA, RB }            ,{PWRCOM, XTO(31,4,TOLLE)},
  "twlng",        { RA, RB }            ,{PPCCOM, XTO(31,4,TOLNG)},
  "tlng",         { RA, RB }            ,{PWRCOM, XTO(31,4,TOLNG)},
  "twgt",         { RA, RB }            ,{PPCCOM, XTO(31,4,TOGT)},
  "tgt",          { RA, RB }            ,{PWRCOM, XTO(31,4,TOGT)},
  "twge",         { RA, RB }            ,{PPCCOM, XTO(31,4,TOGE)},
  "tge",          { RA, RB }            ,{PWRCOM, XTO(31,4,TOGE)},
  "twnl",         { RA, RB }            ,{PPCCOM, XTO(31,4,TONL)},
  "tnl",          { RA, RB }            ,{PWRCOM, XTO(31,4,TONL)},
  "twlt",         { RA, RB }            ,{PPCCOM, XTO(31,4,TOLT)},
  "tlt",          { RA, RB }            ,{PWRCOM, XTO(31,4,TOLT)},
  "twle",         { RA, RB }            ,{PPCCOM, XTO(31,4,TOLE)},
  "tle",          { RA, RB }            ,{PWRCOM, XTO(31,4,TOLE)},
  "twng",         { RA, RB }            ,{PPCCOM, XTO(31,4,TONG)},
  "tng",          { RA, RB }            ,{PWRCOM, XTO(31,4,TONG)},
  "twne",         { RA, RB }            ,{PPCCOM, XTO(31,4,TONE)},
  "tne",          { RA, RB }            ,{PWRCOM, XTO(31,4,TONE)},
  "trap",         { 0 }                 ,{PPCCOM, XTO(31,4,TOU)},
  "tw",           { TO, RA, RB }        ,{PPCCOM, X(31,4)},
  "t",            { TO, RA, RB }        ,{PWRCOM, X(31,4)},

  "subfc",        { RT, RA, RB }        ,{PPCCOM, XO(31,8,0,0)},
  "sf",           { RT, RA, RB }        ,{PWRCOM, XO(31,8,0,0)},
  "subc",         { RT, RB, RA }        ,{PPC,    XO(31,8,0,0)},
  "subfc.",       { RT, RA, RB }        ,{PPCCOM, XO(31,8,0,1)},
  "sf.",          { RT, RA, RB }        ,{PWRCOM, XO(31,8,0,1)},
  "subc.",        { RT, RB, RA }        ,{PPCCOM, XO(31,8,0,1)},
  "subfco",       { RT, RA, RB }        ,{PPCCOM, XO(31,8,1,0)},
  "sfo",          { RT, RA, RB }        ,{PWRCOM, XO(31,8,1,0)},
  "subco",        { RT, RB, RA }        ,{PPC,    XO(31,8,1,0)},
  "subfco.",      { RT, RA, RB }        ,{PPCCOM, XO(31,8,1,1)},
  "sfo.",         { RT, RA, RB }        ,{PWRCOM, XO(31,8,1,1)},
  "subco.",       { RT, RB, RA }        ,{PPC,    XO(31,8,1,1)},

  "mulhdu",       { RT, RA, RB }        ,{PPC64,  XO(31,9,0,0)},
  "mulhdu.",      { RT, RA, RB }        ,{PPC64,  XO(31,9,0,1)},

  "addc",         { RT, RA, RB }        ,{PPCCOM, XO(31,10,0,0)},
  "a",            { RT, RA, RB }        ,{PWRCOM, XO(31,10,0,0)},
  "addc.",        { RT, RA, RB }        ,{PPCCOM, XO(31,10,0,1)},
  "a.",           { RT, RA, RB }        ,{PWRCOM, XO(31,10,0,1)},
  "addco",        { RT, RA, RB }        ,{PPCCOM, XO(31,10,1,0)},
  "ao",           { RT, RA, RB }        ,{PWRCOM, XO(31,10,1,0)},
  "addco.",       { RT, RA, RB }        ,{PPCCOM, XO(31,10,1,1)},
  "ao.",          { RT, RA, RB }        ,{PWRCOM, XO(31,10,1,1)},

  "mulhwu",       { RT, RA, RB }        ,{PPC,    XO(31,11,0,0)},
  "mulhwu.",      { RT, RA, RB }        ,{PPC,    XO(31,11,0,1)},

  "isellt",       { RT, RA, RB }        ,{ISEL,   X(31,15)},
  "iselgt",       { RT, RA, RB }        ,{ISEL,   X(31,47)},
  "iseleq",       { RT, RA, RB }        ,{ISEL,   X(31,79)},
  "isel",         { RT, RA, RB, CRB }   ,{ISEL,   XISEL(31,15)},

  "mfcr",         { RT }                ,{COM,    X(31,19)},

  "lwarx",        { RT, RA, RB }        ,{PPC,    X(31,20)},

  "ldx",          { RT, RA, RB }        ,{PPC64,  X(31,21)},

  "icbt",         { RA, RB }            ,{VLBE3,   X(31,22)},
  "icbt",         { RA, RB }            ,{PPC403,  X(31,262)},

  "lwzx",         { RT, RA, RB }        ,{PPCCOM, X(31,23)},
  "lx",           { RT, RA, RB }        ,{PWRCOM, X(31,23)},

  "slw",          { RA, RS, RB }        ,{PPCCOM, XRC(31,24,0)},
  "sl",           { RA, RS, RB }        ,{PWRCOM, XRC(31,24,0)},
  "slw.",         { RA, RS, RB }        ,{PPCCOM, XRC(31,24,1)},
  "sl.",          { RA, RS, RB }        ,{PWRCOM, XRC(31,24,1)},

  "cntlzw",       { RA, RS }            ,{PPCCOM, XRC(31,26,0)},
  "cntlz",        { RA, RS }            ,{PWRCOM, XRC(31,26,0)},
  "cntlzw.",      { RA, RS }            ,{PPCCOM, XRC(31,26,1)},
  "cntlz.",       { RA, RS }            ,{PWRCOM, XRC(31,26,1)},

  "sld",          { RA, RS, RB }        ,{PPC64,  XRC(31,27,0)},
  "sld.",         { RA, RS, RB }        ,{PPC64,  XRC(31,27,1)},

  "and",          { RA, RS, RB }        ,{COM,    XRC(31,28,0)},
  "and.",         { RA, RS, RB }        ,{COM,    XRC(31,28,1)},

  "maskg",        { RA, RS, RB }        ,{M601,   XRC(31,29,0)},
  "maskg.",       { RA, RS, RB }        ,{M601,   XRC(31,29,1)},

  "cmplw",        { OBF, RA, RB }       ,{PPCCOM, XCMPL(31,32,0)},
  "cmpld",        { OBF, RA, RB }       ,{PPC64,  XCMPL(31,32,1)},
  "cmpl",         { BF, L, RA, RB }     ,{PPCONLY,X(31,32)},
  "cmpl",         { BF, RA, RB }        ,{PWRCOM, X(31,32)},

  "subf",         { RT, RA, RB }        ,{PPC,    XO(31,40,0,0)},
  "sub",          { RT, RB, RA }        ,{PPC,    XO(31,40,0,0)},
  "subf.",        { RT, RA, RB }        ,{PPC,    XO(31,40,0,1)},
  "sub.",         { RT, RB, RA }        ,{PPC,    XO(31,40,0,1)},
  "subfo",        { RT, RA, RB }        ,{PPC,    XO(31,40,1,0)},
  "subo",         { RT, RB, RA }        ,{PPC,    XO(31,40,1,0)},
  "subfo.",       { RT, RA, RB }        ,{PPC,    XO(31,40,1,1)},
  "subo.",        { RT, RB, RA }        ,{PPC,    XO(31,40,1,1)},

  "ldux",         { RT, RAL, RB }       ,{PPC64,  X(31,53)},

  "dcbst",        { RA, RB }            ,{PPC,    X(31,54)},

  "lwzux",        { RT, RAL, RB }       ,{PPCCOM, X(31,55)},
  "lux",          { RT, RA, RB }        ,{PWRCOM, X(31,55)},

  "cntlzd",       { RA, RS }            ,{PPC64,  XRC(31,58,0)},
  "cntlzd.",      { RA, RS }            ,{PPC64,  XRC(31,58,1)},

  "andc",         { RA, RS, RB }        ,{COM,    XRC(31,60,0)},
  "andc.",        { RA, RS, RB }        ,{COM,    XRC(31,60,1)},

  "tdlgt",        { RA, RB }            ,{PPC64,  XTO(31,68,TOLGT)},
  "tdllt",        { RA, RB }            ,{PPC64,  XTO(31,68,TOLLT)},
  "tdeq",         { RA, RB }            ,{PPC64,  XTO(31,68,TOEQ)},
  "tdlge",        { RA, RB }            ,{PPC64,  XTO(31,68,TOLGE)},
  "tdlnl",        { RA, RB }            ,{PPC64,  XTO(31,68,TOLNL)},
  "tdlle",        { RA, RB }            ,{PPC64,  XTO(31,68,TOLLE)},
  "tdlng",        { RA, RB }            ,{PPC64,  XTO(31,68,TOLNG)},
  "tdgt",         { RA, RB }            ,{PPC64,  XTO(31,68,TOGT)},
  "tdge",         { RA, RB }            ,{PPC64,  XTO(31,68,TOGE)},
  "tdnl",         { RA, RB }            ,{PPC64,  XTO(31,68,TONL)},
  "tdlt",         { RA, RB }            ,{PPC64,  XTO(31,68,TOLT)},
  "tdle",         { RA, RB }            ,{PPC64,  XTO(31,68,TOLE)},
  "tdng",         { RA, RB }            ,{PPC64,  XTO(31,68,TONG)},
  "tdne",         { RA, RB }            ,{PPC64,  XTO(31,68,TONE)},
  "td",           { TO, RA, RB }        ,{PPC64,  X(31,68)},

  "mulhd",        { RT, RA, RB }        ,{PPC64,  XO(31,73,0,0)},
  "mulhd.",       { RT, RA, RB }        ,{PPC64,  XO(31,73,0,1)},

  "mulhw",        { RT, RA, RB }        ,{PPC,    XO(31,75,0,0)},
  "mulhw.",       { RT, RA, RB }        ,{PPC,    XO(31,75,0,1)},

  "dlmzb",	  { RA, RS, RB }        ,{VL43,   XRC(31,78,0)},
  "dlmzb.",	  { RA, RS, RB }        ,{VL43,   XRC(31,78,1)},

  "mtsrd",        { SR, RS }            ,{PPC64,  X(31,82)},

  "mfmsr",        { RT }                ,{COM,    X(31,83)},

  "ldarx",        { RT, RA, RB }        ,{PPC64,  X(31,84)},

  "dcbf",         { RA, RB }            ,{PPC,    X(31,86)},

  "lbzx",         { RT, RA, RB }        ,{COM,    X(31,87)},

  "neg",          { RT, RA }            ,{COM,    XO(31,104,0,0)},
  "neg.",         { RT, RA }            ,{COM,    XO(31,104,0,1)},
  "nego",         { RT, RA }            ,{COM,    XO(31,104,1,0)},
  "nego.",        { RT, RA }            ,{COM,    XO(31,104,1,1)},

  "mul",          { RT, RA, RB }        ,{M601,   XO(31,107,0,0)},
  "mul.",         { RT, RA, RB }        ,{M601,   XO(31,107,0,1)},
  "mulo",         { RT, RA, RB }        ,{M601,   XO(31,107,1,0)},
  "mulo.",        { RT, RA, RB }        ,{M601,   XO(31,107,1,1)},

  "mtsrdin",      { RS, RB }            ,{PPC64,  X(31,114)},

  "clf",          { RT, RA }            ,{POWER,  X(31,118)},

  "lbzux",        { RT, RAL, RB }       ,{COM,    X(31,119)},

  "not",          { RA, RS, RBS }       ,{COM,    XRC(31,124,0)},
  "nor",          { RA, RS, RB }        ,{COM,    XRC(31,124,0)},
  "not.",         { RA, RS, RBS }       ,{COM,    XRC(31,124,1)},
  "nor.",         { RA, RS, RB }        ,{COM,    XRC(31,124,1)},

  "wrtee",        { RS }                ,{VLBE403,X(31,131)},

  "subfe",        { RT, RA, RB }        ,{PPCCOM, XO(31,136,0,0)},
  "sfe",          { RT, RA, RB }        ,{PWRCOM, XO(31,136,0,0)},
  "subfe.",       { RT, RA, RB }        ,{PPCCOM, XO(31,136,0,1)},
  "sfe.",         { RT, RA, RB }        ,{PWRCOM, XO(31,136,0,1)},
  "subfeo",       { RT, RA, RB }        ,{PPCCOM, XO(31,136,1,0)},
  "sfeo",         { RT, RA, RB }        ,{PWRCOM, XO(31,136,1,0)},
  "subfeo.",      { RT, RA, RB }        ,{PPCCOM, XO(31,136,1,1)},
  "sfeo.",        { RT, RA, RB }        ,{PWRCOM, XO(31,136,1,1)},

  "adde",         { RT, RA, RB }        ,{PPCCOM, XO(31,138,0,0)},
  "ae",           { RT, RA, RB }        ,{PWRCOM, XO(31,138,0,0)},
  "adde.",        { RT, RA, RB }        ,{PPCCOM, XO(31,138,0,1)},
  "ae.",          { RT, RA, RB }        ,{PWRCOM, XO(31,138,0,1)},
  "addeo",        { RT, RA, RB }        ,{PPCCOM, XO(31,138,1,0)},
  "aeo",          { RT, RA, RB }        ,{PWRCOM, XO(31,138,1,0)},
  "addeo.",       { RT, RA, RB }        ,{PPCCOM, XO(31,138,1,1)},
  "aeo.",         { RT, RA, RB }        ,{PWRCOM, XO(31,138,1,1)},

  "mtcr",         { RS }                ,{COM,    XFXM(31,144,0xff)},
  "mtcrf",        { FXM, RS }           ,{COM,    X(31,144)},

  "mtmsr",        { RS }                ,{COM,    X(31,146)},

  "stdx",         { RS, RA, RB }        ,{PPC64,  X(31,149)},

  "stwcx.",       { RS, RA, RB }        ,{PPC,    XRC(31,150,1)},

  "stwx",         { RS, RA, RB }        ,{PPCCOM, X(31,151)},
  "stx",          { RS, RA, RB }        ,{PWRCOM, X(31,151)},

  "slq",          { RA, RS, RB }        ,{M601,   XRC(31,152,0)},
  "slq.",         { RA, RS, RB }        ,{M601,   XRC(31,152,1)},

  "sle",          { RA, RS, RB }        ,{M601,   XRC(31,153,0)},
  "sle.",         { RA, RS, RB }        ,{M601,   XRC(31,153,1)},

  "wrteei",       { E }                 ,{VLBE403,X(31,163)},

  "mtmsrd",       { RS }                ,{PPC64,  X(31,178)},

  "stdux",        { RS, RAS, RB }       ,{PPC64,  X(31,181)},

  "stwux",        { RS, RAS, RB }       ,{PPCCOM, X(31,183)},
  "stux",         { RS, RA, RB }        ,{PWRCOM, X(31,183)},

  "sliq",         { RA, RS, SH }        ,{M601,   XRC(31,184,0)},
  "sliq.",        { RA, RS, SH }        ,{M601,   XRC(31,184,1)},

  "subfze",       { RT, RA }            ,{PPCCOM, XO(31,200,0,0)},
  "sfze",         { RT, RA }            ,{PWRCOM, XO(31,200,0,0)},
  "subfze.",      { RT, RA }            ,{PPCCOM, XO(31,200,0,1)},
  "sfze.",        { RT, RA }            ,{PWRCOM, XO(31,200,0,1)},
  "subfzeo",      { RT, RA }            ,{PPCCOM, XO(31,200,1,0)},
  "sfzeo",        { RT, RA }            ,{PWRCOM, XO(31,200,1,0)},
  "subfzeo.",     { RT, RA }            ,{PPCCOM, XO(31,200,1,1)},
  "sfzeo.",       { RT, RA }            ,{PWRCOM, XO(31,200,1,1)},

  "addze",        { RT, RA }            ,{PPCCOM, XO(31,202,0,0)},
  "aze",          { RT, RA }            ,{PWRCOM, XO(31,202,0,0)},
  "addze.",       { RT, RA }            ,{PPCCOM, XO(31,202,0,1)},
  "aze.",         { RT, RA }            ,{PWRCOM, XO(31,202,0,1)},
  "addzeo",       { RT, RA }            ,{PPCCOM, XO(31,202,1,0)},
  "azeo",         { RT, RA }            ,{PWRCOM, XO(31,202,1,0)},
  "addzeo.",      { RT, RA }            ,{PPCCOM, XO(31,202,1,1)},
  "azeo.",        { RT, RA }            ,{PWRCOM, XO(31,202,1,1)},

  "mtsr",         { SR, RS }            ,{COM32,  X(31,210)},

  "stdcx.",       { RS, RA, RB }        ,{PPC64,  XRC(31,214,1)},

  "stbx",         { RS, RA, RB }        ,{COM,    X(31,215)},

  "sllq",         { RA, RS, RB }        ,{M601,   XRC(31,216,0)},
  "sllq.",        { RA, RS, RB }        ,{M601,   XRC(31,216,1)},

  "sleq",         { RA, RS, RB }        ,{M601,   XRC(31,217,0)},
  "sleq.",        { RA, RS, RB }        ,{M601,   XRC(31,217,1)},

  "subfme",       { RT, RA }            ,{PPCCOM, XO(31,232,0,0)},
  "sfme",         { RT, RA }            ,{PWRCOM, XO(31,232,0,0)},
  "subfme.",      { RT, RA }            ,{PPCCOM, XO(31,232,0,1)},
  "sfme.",        { RT, RA }            ,{PWRCOM, XO(31,232,0,1)},
  "subfmeo",      { RT, RA }            ,{PPCCOM, XO(31,232,1,0)},
  "sfmeo",        { RT, RA }            ,{PWRCOM, XO(31,232,1,0)},
  "subfmeo.",     { RT, RA }            ,{PPCCOM, XO(31,232,1,1)},
  "sfmeo.",       { RT, RA }            ,{PWRCOM, XO(31,232,1,1)},

  "mulld",        { RT, RA, RB }        ,{PPC64,  XO(31,233,0,0)},
  "mulld.",       { RT, RA, RB }        ,{PPC64,  XO(31,233,0,1)},
  "mulldo",       { RT, RA, RB }        ,{PPC64,  XO(31,233,1,0)},
  "mulldo.",      { RT, RA, RB }        ,{PPC64,  XO(31,233,1,1)},

  "addme",        { RT, RA }            ,{PPCCOM, XO(31,234,0,0)},
  "ame",          { RT, RA }            ,{PWRCOM, XO(31,234,0,0)},
  "addme.",       { RT, RA }            ,{PPCCOM, XO(31,234,0,1)},
  "ame.",         { RT, RA }            ,{PWRCOM, XO(31,234,0,1)},
  "addmeo",       { RT, RA }            ,{PPCCOM, XO(31,234,1,0)},
  "ameo",         { RT, RA }            ,{PWRCOM, XO(31,234,1,0)},
  "addmeo.",      { RT, RA }            ,{PPCCOM, XO(31,234,1,1)},
  "ameo.",        { RT, RA }            ,{PWRCOM, XO(31,234,1,1)},

  "mullw",        { RT, RA, RB }        ,{PPCCOM, XO(31,235,0,0)},
  "muls",         { RT, RA, RB }        ,{PWRCOM, XO(31,235,0,0)},
  "mullw.",       { RT, RA, RB }        ,{PPCCOM, XO(31,235,0,1)},
  "muls.",        { RT, RA, RB }        ,{PWRCOM, XO(31,235,0,1)},
  "mullwo",       { RT, RA, RB }        ,{PPCCOM, XO(31,235,1,0)},
  "mulso",        { RT, RA, RB }        ,{PWRCOM, XO(31,235,1,0)},
  "mullwo.",      { RT, RA, RB }        ,{PPCCOM, XO(31,235,1,1)},
  "mulso.",       { RT, RA, RB }        ,{PWRCOM, XO(31,235,1,1)},

  "mtsrin",       { RS, RB }            ,{PPC32,  X(31,242)},
  "mtsri",        { RS, RB }            ,{POWER32,X(31,242)},

  "dcbtst",       { RA, RB }            ,{PPC,    X(31,246)},

  "stbux",        { RS, RAS, RB }       ,{COM,    X(31,247)},

  "slliq",        { RA, RS, SH }        ,{M601,   XRC(31,248,0)},
  "slliq.",       { RA, RS, SH }        ,{M601,   XRC(31,248,1)},

  "mfdcrx",       { RS, RA }            ,{VLBE476,X(31,259)},

  "doz",          { RT, RA, RB }        ,{M601,   XO(31,264,0,0)},
  "doz.",         { RT, RA, RB }        ,{M601,   XO(31,264,0,1)},
  "dozo",         { RT, RA, RB }        ,{M601,   XO(31,264,1,0)},
  "dozo.",        { RT, RA, RB }        ,{M601,   XO(31,264,1,1)},

  "add",          { RT, RA, RB }        ,{PPCCOM, XO(31,266,0,0)},
  "cax",          { RT, RA, RB }        ,{PWRCOM, XO(31,266,0,0)},
  "add.",         { RT, RA, RB }        ,{PPCCOM, XO(31,266,0,1)},
  "cax.",         { RT, RA, RB }        ,{PWRCOM, XO(31,266,0,1)},
  "addo",         { RT, RA, RB }        ,{PPCCOM, XO(31,266,1,0)},
  "caxo",         { RT, RA, RB }        ,{PWRCOM, XO(31,266,1,0)},
  "addo.",        { RT, RA, RB }        ,{PPCCOM, XO(31,266,1,1)},
  "caxo.",        { RT, RA, RB }        ,{PWRCOM, XO(31,266,1,1)},

  "mfapidi",      { RT, RA }            ,{BOOKE,  X(31,275)},

  "lscbx",        { RT, RA, RB }        ,{M601,   XRC(31,277,0)},
  "lscbx.",       { RT, RA, RB }        ,{M601,   XRC(31,277,1)},

  "dcbt",         { RA, RB }            ,{PPC,    X(31,278)},

  "lhzx",         { RT, RA, RB }        ,{COM,    X(31,279)},

  "icbt",         { RA, RB }            ,{PPC403,  X(31,262)},

  "eqv",          { RA, RS, RB }        ,{COM,    XRC(31,284,0)},
  "eqv.",         { RA, RS, RB }        ,{COM,    XRC(31,284,1)},

  "tlbie",        { RB }                ,{PPC,    X(31,306)},
  "tlbi",         { RA, RB }            ,{POWER,  X(31,306)},

  "eciwx",        { RT, RA, RB }        ,{PPC,    X(31,310)},

  "lhzux",        { RT, RAL, RB }       ,{COM,    X(31,311)},

  "xor",          { RA, RS, RB }        ,{COM,    XRC(31,316,0)},
  "xor.",         { RA, RS, RB }        ,{COM,    XRC(31,316,1)},

  "mfexisr",      { RT }                ,{PPC403, XSPR(31,323,64)},
  "mfexier",      { RT }                ,{PPC403, XSPR(31,323,66)},
  "mfbr0",        { RT }                ,{PPC403, XSPR(31,323,128)},
  "mfbr1",        { RT }                ,{PPC403, XSPR(31,323,129)},
  "mfbr2",        { RT }                ,{PPC403, XSPR(31,323,130)},
  "mfbr3",        { RT }                ,{PPC403, XSPR(31,323,131)},
  "mfbr4",        { RT }                ,{PPC403, XSPR(31,323,132)},
  "mfbr5",        { RT }                ,{PPC403, XSPR(31,323,133)},
  "mfbr6",        { RT }                ,{PPC403, XSPR(31,323,134)},
  "mfbr7",        { RT }                ,{PPC403, XSPR(31,323,135)},
  "mfbear",       { RT }                ,{PPC403, XSPR(31,323,144)},
  "mfbesr",       { RT }                ,{PPC403, XSPR(31,323,145)},
  "mfiocr",       { RT }                ,{PPC403, XSPR(31,323,160)},
  "mfdmacr0",     { RT }                ,{PPC403, XSPR(31,323,192)},
  "mfdmact0",     { RT }                ,{PPC403, XSPR(31,323,193)},
  "mfdmada0",     { RT }                ,{PPC403, XSPR(31,323,194)},
  "mfdmasa0",     { RT }                ,{PPC403, XSPR(31,323,195)},
  "mfdmacc0",     { RT }                ,{PPC403, XSPR(31,323,196)},
  "mfdmacr1",     { RT }                ,{PPC403, XSPR(31,323,200)},
  "mfdmact1",     { RT }                ,{PPC403, XSPR(31,323,201)},
  "mfdmada1",     { RT }                ,{PPC403, XSPR(31,323,202)},
  "mfdmasa1",     { RT }                ,{PPC403, XSPR(31,323,203)},
  "mfdmacc1",     { RT }                ,{PPC403, XSPR(31,323,204)},
  "mfdmacr2",     { RT }                ,{PPC403, XSPR(31,323,208)},
  "mfdmact2",     { RT }                ,{PPC403, XSPR(31,323,209)},
  "mfdmada2",     { RT }                ,{PPC403, XSPR(31,323,210)},
  "mfdmasa2",     { RT }                ,{PPC403, XSPR(31,323,211)},
  "mfdmacc2",     { RT }                ,{PPC403, XSPR(31,323,212)},
  "mfdmacr3",     { RT }                ,{PPC403, XSPR(31,323,216)},
  "mfdmact3",     { RT }                ,{PPC403, XSPR(31,323,217)},
  "mfdmada3",     { RT }                ,{PPC403, XSPR(31,323,218)},
  "mfdmasa3",     { RT }                ,{PPC403, XSPR(31,323,219)},
  "mfdmacc3",     { RT }                ,{PPC403, XSPR(31,323,220)},
  "mfdmasr",      { RT }                ,{PPC403, XSPR(31,323,224)},

  "mfdcr",        { RT, SPR }           ,{VLBE403,X(31,323)},

  "div",          { RT, RA, RB }        ,{M601,   XO(31,331,0,0)},
  "div.",         { RT, RA, RB }        ,{M601,   XO(31,331,0,1)},
  "divo",         { RT, RA, RB }        ,{M601,   XO(31,331,1,0)},
  "divo.",        { RT, RA, RB }        ,{M601,   XO(31,331,1,1)},

  "mfpmr",        { RT, PMR }           ,{VLBEPMR,X(31,334)},
  "mtpmr",        { PMR, RS }           ,{VLBEPMR,X(31,462)},

  "mfmq",         { RT }                ,{M601,   XSPR(31,339,0)},
  "mfxer",        { RT }                ,{COM,    XSPR(31,339,1)},
  "mfrtcu",       { RT }                ,{COM,    XSPR(31,339,4)},
  "mfrtcl",       { RT }                ,{COM,    XSPR(31,339,5)},
  "mfdec",        { RT }                ,{MFDEC1, XSPR(31,339,6)},
  "mfdec",        { RT }                ,{MFDEC2, XSPR(31,339,22)},
  "mflr",         { RT }                ,{COM,    XSPR(31,339,8)},
  "mfctr",        { RT }                ,{COM,    XSPR(31,339,9)},
  "mftid",        { RT }                ,{POWER,  XSPR(31,339,17)},
  "mfdsisr",      { RT }                ,{COM,    XSPR(31,339,18)},
  "mfdar",        { RT }                ,{COM,    XSPR(31,339,19)},
  "mfsdr0",       { RT }                ,{POWER,  XSPR(31,339,24)},
  "mfsdr1",       { RT }                ,{COM,    XSPR(31,339,25)},
  "mfsrr0",       { RT }                ,{COM,    XSPR(31,339,26)},
  "mfsrr1",       { RT }                ,{COM,    XSPR(31,339,27)},
  "mfpid",        { RT }                ,{VLBE,   XSPR(31,339,48)},
  "mfpid",        { RT }                ,{PPC403, XSPR(31,339,945)},
  "mfcsrr0",      { RT }                ,{VLBE,   XSPR(31,339,58)},
  "mfcsrr1",      { RT }                ,{VLBE,   XSPR(31,339,59)},
  "mfdear",       { RT }                ,{VLBE,   XSPR(31,339,61)},
  "mfdear",       { RT }                ,{PPC403, XSPR(31,339,981)},
  "mfesr",        { RT }                ,{VLBE,   XSPR(31,339,62)},
  "mfesr",        { RT }                ,{PPC403, XSPR(31,339,980)},
  "mfivpr",       { RT }                ,{VLBE,   XSPR(31,339,63)},
  "mfcmpa",       { RT }                ,{PPC860, XSPR(31,339,144)},
  "mfcmpb",       { RT }                ,{PPC860, XSPR(31,339,145)},
  "mfcmpc",       { RT }                ,{PPC860, XSPR(31,339,146)},
  "mfcmpd",       { RT }                ,{PPC860, XSPR(31,339,147)},
  "mficr",        { RT }                ,{PPC860, XSPR(31,339,148)},
  "mfder",        { RT }                ,{PPC860, XSPR(31,339,149)},
  "mfcounta",     { RT }                ,{PPC860, XSPR(31,339,150)},
  "mfcountb",     { RT }                ,{PPC860, XSPR(31,339,151)},
  "mfcmpe",       { RT }                ,{PPC860, XSPR(31,339,152)},
  "mfcmpf",       { RT }                ,{PPC860, XSPR(31,339,153)},
  "mfcmpg",       { RT }                ,{PPC860, XSPR(31,339,154)},
  "mfcmph",       { RT }                ,{PPC860, XSPR(31,339,155)},
  "mflctrl1",     { RT }                ,{PPC860, XSPR(31,339,156)},
  "mflctrl2",     { RT }                ,{PPC860, XSPR(31,339,157)},
  "mfictrl",      { RT }                ,{PPC860, XSPR(31,339,158)},
  "mfbar",        { RT }                ,{PPC860, XSPR(31,339,159)},

  "mftbl",        { RT }                ,{VLBE,   XSPR(31,339,268)},
  "mftbl",        { RT }                ,{PPC,    XSPR(31,371,268)},
  "mftbu",        { RT }                ,{VLBE,   XSPR(31,339,269)},
  "mftbu",        { RT }                ,{PPC,    XSPR(31,371,269)},
  "mftb",         { RT, TBR }           ,{VLBE,   X(31,339)},
  "mftb",         { RT, TBR }           ,{PPC,    X(31,371)},

  "mfusprg0",     { RT }                ,{VLBE,   XSPR(31,339,256)},
  "mfsprg4",      { RT }                ,{VLBE405,XSPR(31,339,260)},
  "mfsprg5",      { RT }                ,{VLBE405,XSPR(31,339,261)},
  "mfsprg6",      { RT }                ,{VLBE405,XSPR(31,339,262)},
  "mfsprg7",      { RT }                ,{VLBE405,XSPR(31,339,263)},
  "mfsprg",       { RT, SPRG }          ,{PPC,    XSPR(31,339,256)},
  "mfsprg0",      { RT }                ,{PPC,    XSPR(31,339,272)},
  "mfsprg1",      { RT }                ,{PPC,    XSPR(31,339,273)},
  "mfsprg2",      { RT }                ,{PPC,    XSPR(31,339,274)},
  "mfsprg3",      { RT }                ,{PPC,    XSPR(31,339,275)},
  "mfasr",        { RT }                ,{PPC64,  XSPR(31,339,280)},
  "mfear",        { RT }                ,{PPC,    XSPR(31,339,282)},
  "mfpir",        { RT }                ,{VLBE,   XSPR(31,339,286)},
  "mfpvr",        { RT }                ,{PPC,    XSPR(31,339,287)},
  "mfdbsr",       { RT }                ,{VLBE  , XSPR(31,339,304)},
  "mfdbsr",       { RT }                ,{PPC403, XSPR(31,339,1008)},
  "mfdbcr0",      { RT }                ,{VLBE  , XSPR(31,339,308)},
  "mfdbcr0",      { RT }                ,{PPC405, XSPR(31,339,1010)},
  "mfdbcr1",      { RT }                ,{VLBE,   XSPR(31,339,309)},
  "mfdbcr1",      { RT }                ,{PPC405, XSPR(31,339,957)},
  "mfdbcr2",      { RT }                ,{VLBE,   XSPR(31,339,310)},
  "mfiac1",       { RT }                ,{VLBE,   XSPR(31,339,312)},
  "mfiac1",       { RT }                ,{PPC403, XSPR(31,339,1012)},
  "mfiac2",       { RT }                ,{VLBE,   XSPR(31,339,313)},
  "mfiac2",       { RT }                ,{PPC403, XSPR(31,339,1013)},
  "mfiac3",       { RT }                ,{VLBE,   XSPR(31,339,314)},
  "mfiac3",       { RT }                ,{PPC405, XSPR(31,339,948)},
  "mfiac4",       { RT }                ,{VLBE,   XSPR(31,339,315)},
  "mfiac4",       { RT }                ,{PPC405, XSPR(31,339,949)},
  "mfdac1",       { RT }                ,{VLBE,   XSPR(31,339,316)},
  "mfdac1",       { RT }                ,{PPC403, XSPR(31,339,1014)},
  "mfdac2",       { RT }                ,{VLBE,   XSPR(31,339,317)},
  "mfdac2",       { RT }                ,{PPC403, XSPR(31,339,1015)},
  "mfdvc1",       { RT }                ,{VLBE,   XSPR(31,339,318)},
  "mfdvc1",       { RT }                ,{PPC405, XSPR(31,339,950)},
  "mfdvc2",       { RT }                ,{VLBE,   XSPR(31,339,319)},
  "mfdvc2",       { RT }                ,{PPC405, XSPR(31,339,951)},
  "mftsr",        { RT }                ,{VLBE,   XSPR(31,339,336)},
  "mftsr",        { RT }                ,{PPC403, XSPR(31,339,984)},
  "mftcr",        { RT }                ,{VLBE,   XSPR(31,339,340)},
  "mftcr",        { RT }                ,{PPC403, XSPR(31,339,986)},
  "mfivor0",      { RT }                ,{VLBE,   XSPR(31,339,400)},
  "mfivor1",      { RT }                ,{VLBE,   XSPR(31,339,401)},
  "mfivor2",      { RT }                ,{VLBE,   XSPR(31,339,402)},
  "mfivor3",      { RT }                ,{VLBE,   XSPR(31,339,403)},
  "mfivor4",      { RT }                ,{VLBE,   XSPR(31,339,404)},
  "mfivor5",      { RT }                ,{VLBE,   XSPR(31,339,405)},
  "mfivor6",      { RT }                ,{VLBE,   XSPR(31,339,406)},
  "mfivor7",      { RT }                ,{VLBE,   XSPR(31,339,407)},
  "mfivor8",      { RT }                ,{VLBE,   XSPR(31,339,408)},
  "mfivor9",      { RT }                ,{VLBE,   XSPR(31,339,409)},
  "mfivor10",     { RT }                ,{VLBE,   XSPR(31,339,410)},
  "mfivor11",     { RT }                ,{VLBE,   XSPR(31,339,411)},
  "mfivor12",     { RT }                ,{VLBE,   XSPR(31,339,412)},
  "mfivor13",     { RT }                ,{VLBE,   XSPR(31,339,413)},
  "mfivor14",     { RT }                ,{VLBE,   XSPR(31,339,414)},
  "mfivor15",     { RT }                ,{VLBE,   XSPR(31,339,415)},
  "mfspefscr",    { RT }                ,{SPE,    XSPR(31,339,512)},
  "mfivor32",     { RT }                ,{SPE,    XSPR(31,339,528)},
  "mfivor33",     { RT }                ,{SPE,    XSPR(31,339,529)},
  "mfivor34",     { RT }                ,{SPE,    XSPR(31,339,530)},
  "mfivor35",     { RT }                ,{SPE,    XSPR(31,339,531)},
  "mfibatu",      { RT, SPRBAT }        ,{PPC,    XSPR(31,339,528)},
  "mfibatl",      { RT, SPRBAT }        ,{PPC,    XSPR(31,339,529)},
  "mfdbatu",      { RT, SPRBAT }        ,{PPC,    XSPR(31,339,536)},
  "mfdbatl",      { RT, SPRBAT }        ,{PPC,    XSPR(31,339,537)},
  "mfmcsrr0",     { RT }                ,{RFMCI,  XSPR(31,339,570)},
  "mfmcsrr1",     { RT }                ,{RFMCI,  XSPR(31,339,571)},
  "mfmcsr",       { RT }                ,{RFMCI,  XSPR(31,339,572)},
  "mfmcar",       { RT }                ,{RFMCI,  XSPR(31,339,573)},
  "mfic_cst",     { RT }                ,{PPC860, XSPR(31,339,560)},
  "mfic_adr",     { RT }                ,{PPC860, XSPR(31,339,561)},
  "mfic_dat",     { RT }                ,{PPC860, XSPR(31,339,562)},
  "mfdc_cst",     { RT }                ,{PPC860, XSPR(31,339,568)},
  "mfdc_adr",     { RT }                ,{PPC860, XSPR(31,339,569)},
  "mfdc_dat",     { RT }                ,{PPC860, XSPR(31,339,570)},
  "mfdpdr",       { RT }                ,{PPC860, XSPR(31,339,630)},
  "mfdpir",       { RT }                ,{PPC860, XSPR(31,339,631)},
  "mfimmr",       { RT }                ,{PPC860, XSPR(31,339,638)},
  "mfmi_ctr",     { RT }                ,{PPC860, XSPR(31,339,784)},
  "mfmi_ap",      { RT }                ,{PPC860, XSPR(31,339,786)},
  "mfmi_epn",     { RT }                ,{PPC860, XSPR(31,339,787)},
  "mfmi_twc",     { RT }                ,{PPC860, XSPR(31,339,789)},
  "mfmi_rpn",     { RT }                ,{PPC860, XSPR(31,339,790)},
  "mfmd_ctr",     { RT }                ,{PPC860, XSPR(31,339,792)},
  "mfm_casid",    { RT }                ,{PPC860, XSPR(31,339,793)},
  "mfmd_ap",      { RT }                ,{PPC860, XSPR(31,339,794)},
  "mfmd_epn",     { RT }                ,{PPC860, XSPR(31,339,795)},
  "mfmd_twb",     { RT }                ,{PPC860, XSPR(31,339,796)},
  "mfmd_twc",     { RT }                ,{PPC860, XSPR(31,339,797)},
  "mfmd_rpn",     { RT }                ,{PPC860, XSPR(31,339,798)},
  "mfm_tw",       { RT }                ,{PPC860, XSPR(31,339,799)},
  "mfmi_dbcam",   { RT }                ,{PPC860, XSPR(31,339,816)},
  "mfmi_dbram0",  { RT }                ,{PPC860, XSPR(31,339,817)},
  "mfmi_dbram1",  { RT }                ,{PPC860, XSPR(31,339,818)},
  "mfmd_dbcam",   { RT }                ,{PPC860, XSPR(31,339,824)},
  "mfmd_dbram0",  { RT }                ,{PPC860, XSPR(31,339,825)},
  "mfmd_dbram1",  { RT }                ,{PPC860, XSPR(31,339,826)},
  "mfzpr",        { RT }                ,{PPC403, XSPR(31,339,944)},
  "mfccr0",       { RT }                ,{PPC405, XSPR(31,339,947)},
  "mficdbdr",     { RT }                ,{PPC403, XSPR(31,339,979)},
  "mfummcr0",     { RT }                ,{PPC750, XSPR(31,339,936)},
  "mfupmc1",      { RT }                ,{PPC750, XSPR(31,339,937)},
  "mfupmc2",      { RT }                ,{PPC750, XSPR(31,339,938)},
  "mfusia",       { RT }                ,{PPC750, XSPR(31,339,939)},
  "mfummcr1",     { RT }                ,{PPC750, XSPR(31,339,940)},
  "mfupmc3",      { RT }                ,{PPC750, XSPR(31,339,941)},
  "mfupmc4",      { RT }                ,{PPC750, XSPR(31,339,942)},
  "mfmmcr0",      { RT }                ,{PPC750, XSPR(31,339,952)},
  "mfpmc1",       { RT }                ,{PPC750, XSPR(31,339,953)},
  "mfsgr",        { RT }                ,{PPC403, XSPR(31,339,953)},
  "mfpmc2",       { RT }                ,{PPC750, XSPR(31,339,954)},
  "mfdcwr",       { RT }                ,{PPC403, XSPR(31,339,954)},
  "mfsia",        { RT }                ,{PPC750, XSPR(31,339,955)},
  "mfsler",       { RT }                ,{PPC405, XSPR(31,339,955)},
  "mfmmcr1",      { RT }                ,{PPC750, XSPR(31,339,956)},
  "mfsu0r",       { RT }                ,{PPC405, XSPR(31,339,956)},
  "mfpmc3",       { RT }                ,{PPC750, XSPR(31,339,957)},
  "mfpmc4",       { RT }                ,{PPC750, XSPR(31,339,958)},
  "mfevpr",       { RT }                ,{PPC403, XSPR(31,339,982)},
  "mfcdbcr",      { RT }                ,{PPC403, XSPR(31,339,983)},
  "mfpit",        { RT }                ,{PPC403, XSPR(31,339,987)},
  "mftbhi",       { RT }                ,{PPC403, XSPR(31,339,988)},
  "mftblo",       { RT }                ,{PPC403, XSPR(31,339,989)},
  "mfsrr2",       { RT }                ,{PPC403, XSPR(31,339,990)},
  "mfsrr3",       { RT }                ,{PPC403, XSPR(31,339,991)},
  "mfdccr",       { RT }                ,{PPC403, XSPR(31,339,1018)},
  "mficcr",       { RT }                ,{PPC403, XSPR(31,339,1019)},
  "mfpbl1",       { RT }                ,{PPC403, XSPR(31,339,1020)},
  "mfpbu1",       { RT }                ,{PPC403, XSPR(31,339,1021)},
  "mfpbl2",       { RT }                ,{PPC403, XSPR(31,339,1022)},
  "mfpbu2",       { RT }                ,{PPC403, XSPR(31,339,1023)},
  "mfl2cr",       { RT }                ,{PPC750, XSPR(31,339,1017)},
  "mfictc",       { RT }                ,{PPC750, XSPR(31,339,1019)},
  "mfthrm1",      { RT }                ,{PPC750, XSPR(31,339,1020)},
  "mfthrm2",      { RT }                ,{PPC750, XSPR(31,339,1021)},
  "mfthrm3",      { RT }                ,{PPC750, XSPR(31,339,1022)},
  "mfspr",        { RT, SPR }           ,{COM,    X(31,339)},

  "lwax",         { RT, RA, RB }        ,{PPC64,  X(31,341)},

  "dst",          { RA, RB, STRM, AT }  ,{AVEC,   X(31,342)},
  "dstt",         { RA, RB, STRM }      ,{AVEC,   XDS(31,342,1)},

  "lhax",         { RT, RA, RB }        ,{COM,    X(31,343)},

  "dccci",        { RA, RB }            ,{PPC403, X(31,454)},

  "abs",          { RT, RA }            ,{M601,   XO(31,360,0,0)},
  "abs.",         { RT, RA }            ,{M601,   XO(31,360,0,1)},
  "abso",         { RT, RA }            ,{M601,   XO(31,360,1,0)},
  "abso.",        { RT, RA }            ,{M601,   XO(31,360,1,1)},

  "divs",         { RT, RA, RB }        ,{M601,   XO(31,363,0,0)},
  "divs.",        { RT, RA, RB }        ,{M601,   XO(31,363,0,1)},
  "divso",        { RT, RA, RB }        ,{M601,   XO(31,363,1,0)},
  "divso.",       { RT, RA, RB }        ,{M601,   XO(31,363,1,1)},

  "tlbia",        { 0 }                 ,{PPC,    X(31,370)},

  "lwaux",        { RT, RAL, RB }       ,{PPC64,  X(31,373)},

  "dstst",        { RA, RB, STRM, AT }  ,{AVEC,   X(31,374)},
  "dststt",       { RA, RB, STRM }      ,{AVEC,   XDS(31,374,1)},

  "lhaux",        { RT, RAL, RB }       ,{COM,    X(31,375)},

  "mtdcrx",       { RA, RS }            ,{VLBE476,X(31,387)},

  "sthx",         { RS, RA, RB }        ,{COM,    X(31,407)},

  "lfqx",         { FRT, RA, RB }       ,{POWER2, X(31,791)},

  "lfqux",        { FRT, RA, RB }       ,{POWER2, X(31,823)},

  "stfqx",        { FRS, RA, RB }       ,{POWER2, X(31,919)},

  "stfqux",       { FRS, RA, RB }       ,{POWER2, X(31,951)},

  "orc",          { RA, RS, RB }        ,{COM,    XRC(31,412,0)},
  "orc.",         { RA, RS, RB }        ,{COM,    XRC(31,412,1)},

  "sradi",        { RA, RS, SH6 }       ,{PPC64,  XS(31,413,0)},
  "sradi.",       { RA, RS, SH6 }       ,{PPC64,  XS(31,413,1)},

  "slbie",        { RB }                ,{PPC64,  X(31,434)},

  "ecowx",        { RT, RA, RB }        ,{PPC,    X(31,438)},

  "sthux",        { RS, RAS, RB }       ,{COM,    X(31,439)},

  "mr",           { RA, RS, RBS }       ,{COM,    XRC(31,444,0)},
  "or",           { RA, RS, RB }        ,{COM,    XRC(31,444,0)},
  "mr.",          { RA, RS, RBS }       ,{COM,    XRC(31,444,1)},
  "or.",          { RA, RS, RB }        ,{COM,    XRC(31,444,1)},

  "mtexisr",      { RT }                ,{PPC403, XSPR(31,451,64)},
  "mtexier",      { RT }                ,{PPC403, XSPR(31,451,66)},
  "mtbr0",        { RT }                ,{PPC403, XSPR(31,451,128)},
  "mtbr1",        { RT }                ,{PPC403, XSPR(31,451,129)},
  "mtbr2",        { RT }                ,{PPC403, XSPR(31,451,130)},
  "mtbr3",        { RT }                ,{PPC403, XSPR(31,451,131)},
  "mtbr4",        { RT }                ,{PPC403, XSPR(31,451,132)},
  "mtbr5",        { RT }                ,{PPC403, XSPR(31,451,133)},
  "mtbr6",        { RT }                ,{PPC403, XSPR(31,451,134)},
  "mtbr7",        { RT }                ,{PPC403, XSPR(31,451,135)},
  "mtbear",       { RT }                ,{PPC403, XSPR(31,451,144)},
  "mtbesr",       { RT }                ,{PPC403, XSPR(31,451,145)},
  "mtiocr",       { RT }                ,{PPC403, XSPR(31,451,160)},
  "mtdmacr0",     { RT }                ,{PPC403, XSPR(31,451,192)},
  "mtdmact0",     { RT }                ,{PPC403, XSPR(31,451,193)},
  "mtdmada0",     { RT }                ,{PPC403, XSPR(31,451,194)},
  "mtdmasa0",     { RT }                ,{PPC403, XSPR(31,451,195)},
  "mtdmacc0",     { RT }                ,{PPC403, XSPR(31,451,196)},
  "mtdmacr1",     { RT }                ,{PPC403, XSPR(31,451,200)},
  "mtdmact1",     { RT }                ,{PPC403, XSPR(31,451,201)},
  "mtdmada1",     { RT }                ,{PPC403, XSPR(31,451,202)},
  "mtdmasa1",     { RT }                ,{PPC403, XSPR(31,451,203)},
  "mtdmacc1",     { RT }                ,{PPC403, XSPR(31,451,204)},
  "mtdmacr2",     { RT }                ,{PPC403, XSPR(31,451,208)},
  "mtdmact2",     { RT }                ,{PPC403, XSPR(31,451,209)},
  "mtdmada2",     { RT }                ,{PPC403, XSPR(31,451,210)},
  "mtdmasa2",     { RT }                ,{PPC403, XSPR(31,451,211)},
  "mtdmacc2",     { RT }                ,{PPC403, XSPR(31,451,212)},
  "mtdmacr3",     { RT }                ,{PPC403, XSPR(31,451,216)},
  "mtdmact3",     { RT }                ,{PPC403, XSPR(31,451,217)},
  "mtdmada3",     { RT }                ,{PPC403, XSPR(31,451,218)},
  "mtdmasa3",     { RT }                ,{PPC403, XSPR(31,451,219)},
  "mtdmacc3",     { RT }                ,{PPC403, XSPR(31,451,220)},
  "mtdmasr",      { RT }                ,{PPC403, XSPR(31,451,224)},
  "mtdcr",        { SPR, RS }           ,{VLBE403,X(31,451)},

  "dccci",        { RAOPT, RBOPT }      ,{PPC43,  X(31,454)},

  "divdu",        { RT, RA, RB }        ,{PPC64,  XO(31,457,0,0)},
  "divdu.",       { RT, RA, RB }        ,{PPC64,  XO(31,457,0,1)},
  "divduo",       { RT, RA, RB }        ,{PPC64,  XO(31,457,1,0)},
  "divduo.",      { RT, RA, RB }        ,{PPC64,  XO(31,457,1,1)},

  "divwu",        { RT, RA, RB }        ,{PPC,    XO(31,459,0,0)},
  "divwu.",       { RT, RA, RB }        ,{PPC,    XO(31,459,0,1)},
  "divwuo",       { RT, RA, RB }        ,{PPC,    XO(31,459,1,0)},
  "divwuo.",      { RT, RA, RB }        ,{PPC,    XO(31,459,1,1)},

  "mtmq",         { RS }                ,{M601,   XSPR(31,467,0)},
  "mtxer",        { RS }                ,{COM,    XSPR(31,467,1)},
  "mtlr",         { RS }                ,{COM,    XSPR(31,467,8)},
  "mtctr",        { RS }                ,{COM,    XSPR(31,467,9)},
  "mttid",        { RS }                ,{POWER,  XSPR(31,467,17)},
  "mtdsisr",      { RS }                ,{COM,    XSPR(31,467,18)},
  "mtdar",        { RS }                ,{COM,    XSPR(31,467,19)},
  "mtrtcu",       { RS }                ,{COM,    XSPR(31,467,20)},
  "mtrtcl",       { RS }                ,{COM,    XSPR(31,467,21)},
  "mtdec",        { RS }                ,{COM,    XSPR(31,467,22)},
  "mtsdr0",       { RS }                ,{POWER,  XSPR(31,467,24)},
  "mtsdr1",       { RS }                ,{COM,    XSPR(31,467,25)},
  "mtsrr0",       { RS }                ,{COM,    XSPR(31,467,26)},
  "mtsrr1",       { RS }                ,{COM,    XSPR(31,467,27)},
  "mtpid",        { RS }                ,{VLBE,   XSPR(31,467,48)},
  "mtpid",        { RS }                ,{PPC403, XSPR(31,467,945)},
  "mtdecar",      { RS }                ,{VLBE,   XSPR(31,467,54)},
  "mtcsrr0",      { RS }                ,{VLBE,   XSPR(31,467,58)},
  "mtcsrr1",      { RS }                ,{VLBE,   XSPR(31,467,59)},
  "mtdear",       { RS }                ,{VLBE,   XSPR(31,467,61)},
  "mtdear",       { RS }                ,{PPC403, XSPR(31,467,981)},
  "mtesr",        { RS }                ,{VLBE,   XSPR(31,467,62)},
  "mtesr",        { RS }                ,{PPC403, XSPR(31,467,980)},
  "mtivpr",       { RS }                ,{VLBE,   XSPR(31,467,63)},
  "mtcmpa",       { RS }                ,{PPC860, XSPR(31,467,144)},
  "mtcmpb",       { RS }                ,{PPC860, XSPR(31,467,145)},
  "mtcmpc",       { RS }                ,{PPC860, XSPR(31,467,146)},
  "mtcmpd",       { RS }                ,{PPC860, XSPR(31,467,147)},
  "mticr",        { RS }                ,{PPC860, XSPR(31,467,148)},
  "mtder",        { RS }                ,{PPC860, XSPR(31,467,149)},
  "mtcounta",     { RS }                ,{PPC860, XSPR(31,467,150)},
  "mtcountb",     { RS }                ,{PPC860, XSPR(31,467,151)},
  "mtcmpe",       { RS }                ,{PPC860, XSPR(31,467,152)},
  "mtcmpf",       { RS }                ,{PPC860, XSPR(31,467,153)},
  "mtcmpg",       { RS }                ,{PPC860, XSPR(31,467,154)},
  "mtcmph",       { RS }                ,{PPC860, XSPR(31,467,155)},
  "mtlctrl1",     { RS }                ,{PPC860, XSPR(31,467,156)},
  "mtlctrl2",     { RS }                ,{PPC860, XSPR(31,467,157)},
  "mtictrl",      { RS }                ,{PPC860, XSPR(31,467,158)},
  "mtbar",        { RS }                ,{PPC860, XSPR(31,467,159)},
  "mtusprg0",     { RS }                ,{VLBE,   XSPR(31,467,256)},
  "mtsprg",       { SPRG, RS }          ,{PPC,    XSPR(31,467,256)},
  "mtsprg0",      { RS }                ,{PPC,    XSPR(31,467,272)},
  "mtsprg1",      { RS }                ,{PPC,    XSPR(31,467,273)},
  "mtsprg2",      { RS }                ,{PPC,    XSPR(31,467,274)},
  "mtsprg3",      { RS }                ,{PPC,    XSPR(31,467,275)},
  "mtsprg4",      { RS }                ,{VLBE405,XSPR(31,467,276)},
  "mtsprg5",      { RS }                ,{VLBE405,XSPR(31,467,277)},
  "mtsprg6",      { RS }                ,{VLBE405,XSPR(31,467,278)},
  "mtsprg7",      { RS }                ,{VLBE405,XSPR(31,467,279)},
  "mtasr",        { RS }                ,{PPC64,  XSPR(31,467,280)},
  "mtear",        { RS }                ,{PPC,    XSPR(31,467,282)},
  "mttbl",        { RS }                ,{PPC,    XSPR(31,467,284)},
  "mttbu",        { RS }                ,{PPC,    XSPR(31,467,285)},
  "mtdbsr",       { RS }                ,{VLBE,   XSPR(31,467,304)},
  "mtdbsr",       { RS }                ,{PPC403, XSPR(31,467,1008)},
  "mtdbcr0",      { RS }                ,{VLBE,   XSPR(31,467,308)},
  "mtdbcr0",      { RS }                ,{PPC405, XSPR(31,467,1010)},
  "mtdbcr1",      { RS }                ,{VLBE,   XSPR(31,467,309)},
  "mtdbcr1",      { RS }                ,{PPC405, XSPR(31,467,957)},
  "mtdbcr2",      { RS }                ,{VLBE,   XSPR(31,467,310)},
  "mtiac1",       { RS }                ,{VLBE,   XSPR(31,467,312)},
  "mtiac1",       { RS }                ,{PPC403, XSPR(31,467,1012)},
  "mtiac2",       { RS }                ,{VLBE,   XSPR(31,467,313)},
  "mtiac2",       { RS }                ,{PPC403, XSPR(31,467,1013)},
  "mtiac3",       { RS }                ,{VLBE,   XSPR(31,467,314)},
  "mtiac3",       { RS }                ,{PPC405, XSPR(31,467,948)},
  "mtiac4",       { RS }                ,{VLBE,   XSPR(31,467,315)},
  "mtiac4",       { RS }                ,{PPC405, XSPR(31,467,949)},
  "mtdac1",       { RS }                ,{VLBE,   XSPR(31,467,316)},
  "mtdac1",       { RS }                ,{PPC403, XSPR(31,467,1014)},
  "mtdac2",       { RS }                ,{VLBE,   XSPR(31,467,317)},
  "mtdac2",       { RS }                ,{PPC403, XSPR(31,467,1015)},
  "mtdvc1",       { RS }                ,{VLBE,   XSPR(31,467,318)},
  "mtdvc1",       { RS }                ,{PPC405, XSPR(31,467,950)},
  "mtdvc2",       { RS }                ,{VLBE,   XSPR(31,467,319)},
  "mtdvc2",       { RS }                ,{PPC405, XSPR(31,467,951)},
  "mttsr",        { RS }                ,{VLBE,   XSPR(31,467,336)},
  "mttsr",        { RS }                ,{PPC403, XSPR(31,467,984)},
  "mttcr",        { RS }                ,{VLBE,   XSPR(31,467,340)},
  "mttcr",        { RS }                ,{PPC403, XSPR(31,467,986)},
  "mtivor0",      { RS }                ,{VLBE,   XSPR(31,467,400)},
  "mtivor1",      { RS }                ,{VLBE,   XSPR(31,467,401)},
  "mtivor2",      { RS }                ,{VLBE,   XSPR(31,467,402)},
  "mtivor3",      { RS }                ,{VLBE,   XSPR(31,467,403)},
  "mtivor4",      { RS }                ,{VLBE,   XSPR(31,467,404)},
  "mtivor5",      { RS }                ,{VLBE,   XSPR(31,467,405)},
  "mtivor6",      { RS }                ,{VLBE,   XSPR(31,467,406)},
  "mtivor7",      { RS }                ,{VLBE,   XSPR(31,467,407)},
  "mtivor8",      { RS }                ,{VLBE,   XSPR(31,467,408)},
  "mtivor9",      { RS }                ,{VLBE,   XSPR(31,467,409)},
  "mtivor10",     { RS }                ,{VLBE,   XSPR(31,467,410)},
  "mtivor11",     { RS }                ,{VLBE,   XSPR(31,467,411)},
  "mtivor12",     { RS }                ,{VLBE,   XSPR(31,467,412)},
  "mtivor13",     { RS }                ,{VLBE,   XSPR(31,467,413)},
  "mtivor14",     { RS }                ,{VLBE,   XSPR(31,467,414)},
  "mtivor15",     { RS }                ,{VLBE,   XSPR(31,467,415)},
  "mtspefscr",    { RS }                ,{SPE,    XSPR(31,467,512)},
  "mtivor32",     { RS }                ,{SPE,    XSPR(31,467,528)},
  "mtivor33",     { RS }                ,{SPE,    XSPR(31,467,529)},
  "mtivor34",     { RS }                ,{SPE,    XSPR(31,467,530)},
  "mtivor35",     { RS }                ,{PPCPMR, XSPR(31,467,531)},
  "mtibatu",      { SPRBAT, RS }        ,{PPC,    XSPR(31,467,528)},
  "mtibatl",      { SPRBAT, RS }        ,{PPC,    XSPR(31,467,529)},
  "mtdbatu",      { SPRBAT, RS }        ,{PPC,    XSPR(31,467,536)},
  "mtdbatl",      { SPRBAT, RS }        ,{PPC,    XSPR(31,467,537)},
  "mtmcsrr0",     { RS }                ,{VLRFMCI,XSPR(31,467,570)}, 
  "mtmcsrr1",     { RS }                ,{VLRFMCI,XSPR(31,467,571)}, 
  "mtmcsr",       { RS }                ,{RFMCI,  XSPR(31,467,572)}, 
  "mtzpr",        { RS }                ,{PPC403, XSPR(31,467,944)},
  "mtccr0",       { RS }                ,{PPC405, XSPR(31,467,947)},
  "mtsgr",        { RS }                ,{PPC403, XSPR(31,467,953)},
  "mtdcwr",       { RS }                ,{PPC403, XSPR(31,467,954)},
  "mtsler",       { RS }                ,{PPC405, XSPR(31,467,955)},
  "mtsu0r",       { RS }                ,{PPC405, XSPR(31,467,956)},
  "mticdbdr",     { RS }                ,{PPC403, XSPR(31,467,979)},
  "mtevpr",       { RS }                ,{PPC403, XSPR(31,467,982)},
  "mtcdbcr",      { RS }                ,{PPC403, XSPR(31,467,983)},
  "mtpit",        { RS }                ,{PPC403, XSPR(31,467,987)},
  "mttbhi",       { RS }                ,{PPC403, XSPR(31,467,988)},
  "mttblo",       { RS }                ,{PPC403, XSPR(31,467,989)},
  "mtsrr2",       { RS }                ,{PPC403, XSPR(31,467,990)},
  "mtsrr3",       { RS }                ,{PPC403, XSPR(31,467,991)},
  "mtdccr",       { RS }                ,{PPC403, XSPR(31,467,1018)},
  "mticcr",       { RS }                ,{PPC403, XSPR(31,467,1019)},
  "mtpbl1",       { RS }                ,{PPC403, XSPR(31,467,1020)},
  "mtpbu1",       { RS }                ,{PPC403, XSPR(31,467,1021)},
  "mtpbl2",       { RS }                ,{PPC403, XSPR(31,467,1022)},
  "mtpbu2",       { RS }                ,{PPC403, XSPR(31,467,1023)},
  "mtummcr0",     { RS }                ,{PPC750, XSPR(31,467,936)},
  "mtupmc1",      { RS }                ,{PPC750, XSPR(31,467,937)},
  "mtupmc2",      { RS }                ,{PPC750, XSPR(31,467,938)},
  "mtusia",       { RS }                ,{PPC750, XSPR(31,467,939)},
  "mtummcr1",     { RS }                ,{PPC750, XSPR(31,467,940)},
  "mtupmc3",      { RS }                ,{PPC750, XSPR(31,467,941)},
  "mtupmc4",      { RS }                ,{PPC750, XSPR(31,467,942)},
  "mtmmcr0",      { RS }                ,{PPC750, XSPR(31,467,952)},
  "mtpmc1",       { RS }                ,{PPC750, XSPR(31,467,953)},
  "mtpmc2",       { RS }                ,{PPC750, XSPR(31,467,954)},
  "mtsia",        { RS }                ,{PPC750, XSPR(31,467,955)},
  "mtmmcr1",      { RS }                ,{PPC750, XSPR(31,467,956)},
  "mtpmc3",       { RS }                ,{PPC750, XSPR(31,467,957)},
  "mtpmc4",       { RS }                ,{PPC750, XSPR(31,467,958)},
  "mtl2cr",       { RS }                ,{PPC750, XSPR(31,467,1017)},
  "mtictc",       { RS }                ,{PPC750, XSPR(31,467,1019)},
  "mtthrm1",      { RS }                ,{PPC750, XSPR(31,467,1020)},
  "mtthrm2",      { RS }                ,{PPC750, XSPR(31,467,1021)},
  "mtthrm3",      { RS }                ,{PPC750, XSPR(31,467,1022)},
  "mtspr",        { SPR, RS }           ,{COM,    X(31,467)},

  "dcbi",         { RA, RB }            ,{PPC,    X(31,470)},

  "nand",         { RA, RS, RB }        ,{COM,    XRC(31,476,0)},
  "nand.",        { RA, RS, RB }        ,{COM,    XRC(31,476,1)},

  "dcread",       { RT, RA, RB }        ,{VL43,   X(31,486)},

  "nabs",         { RT, RA }            ,{M601,   XO(31,488,0,0)},
  "nabs.",        { RT, RA }            ,{M601,   XO(31,488,0,1)},
  "nabso",        { RT, RA }            ,{M601,   XO(31,488,1,0)},
  "nabso.",       { RT, RA }            ,{M601,   XO(31,488,1,1)},

  "divd",         { RT, RA, RB }        ,{PPC64,  XO(31,489,0,0)},
  "divd.",        { RT, RA, RB }        ,{PPC64,  XO(31,489,0,1)},
  "divdo",        { RT, RA, RB }        ,{PPC64,  XO(31,489,1,0)},
  "divdo.",       { RT, RA, RB }        ,{PPC64,  XO(31,489,1,1)},

  "divw",         { RT, RA, RB }        ,{PPC,    XO(31,491,0,0)},
  "divw.",        { RT, RA, RB }        ,{PPC,    XO(31,491,0,1)},
  "divwo",        { RT, RA, RB }        ,{PPC,    XO(31,491,1,0)},
  "divwo.",       { RT, RA, RB }        ,{PPC,    XO(31,491,1,1)},

  "slbia",        { 0 }                 ,{PPC64,  X(31,498)},

  "cli",          { RT, RA }            ,{POWER,  X(31,502)},

  "mcrxr",        { BF }                ,{COM,    X(31,512)},

  "clcs",         { RT, RA }            ,{M601,   X(31,531)},

  "lswx",         { RT, RA, RB }        ,{PPCCOM, X(31,533)},
  "lsx",          { RT, RA, RB }        ,{PWRCOM, X(31,533)},

  "lwbrx",        { RT, RA, RB }        ,{PPCCOM, X(31,534)},
  "lbrx",         { RT, RA, RB }        ,{PWRCOM, X(31,534)},

  "lfsx",         { FRT, RA, RB }       ,{COM,    X(31,535)},

  "srw",          { RA, RS, RB }        ,{PPCCOM, XRC(31,536,0)},
  "sr",           { RA, RS, RB }        ,{PWRCOM, XRC(31,536,0)},
  "srw.",         { RA, RS, RB }        ,{PPCCOM, XRC(31,536,1)},
  "sr.",          { RA, RS, RB }        ,{PWRCOM, XRC(31,536,1)},

  "rrib",         { RA, RS, RB }        ,{M601,   XRC(31,537,0)},
  "rrib.",        { RA, RS, RB }        ,{M601,   XRC(31,537,1)},

  "srd",          { RA, RS, RB }        ,{PPC64,  XRC(31,539,0)},
  "srd.",         { RA, RS, RB }        ,{PPC64,  XRC(31,539,1)},

  "maskir",       { RA, RS, RB }        ,{M601,   XRC(31,541,0)},
  "maskir.",      { RA, RS, RB }        ,{M601,   XRC(31,541,1)},

  "tlbsync",      { 0 }                 ,{PPC,    X(31,566)},

  "lfsux",        { FRT, RAS, RB }      ,{COM,    X(31,567)},

  "mfsr",         { RT, SR }            ,{COM32,  X(31,595)},

  "lswi",         { RT, RA, NB }        ,{PPCCOM, X(31,597)},
  "lsi",          { RT, RA, NB }        ,{PWRCOM, X(31,597)},

  "hwsync",       { 0 }                 ,{BE476,  XSYNC(31,598,0)},
  "lwsync",       { 0 }                 ,{PPC,    XSYNC(31,598,1)},
  "ptesync",      { 0 }                 ,{PPC64,  XSYNC(31,598,2)},
  "sync",         { LS }                ,{VLCOM,  X(31,598)},
  "sync",         { 0 }                 ,{BE476,  X(31,598)},
  "msync",        { 0 }                 ,{BE476,  X(31,598)},
  "dcs",          { 0 }                 ,{PWRCOM, X(31,598)},

  "lfdx",         { FRT, RA, RB }       ,{COM,    X(31,599)},

  "mfsri",        { RT, RA, RB }        ,{PWRCOM, X(31,627)},

  "dclst",        { RS, RA }            ,{PWRCOM, X(31,630)},

  "lfdux",        { FRT, RAS, RB }      ,{COM,    X(31,631)},

  "mfsrin",       { RT, RB }            ,{PPC32,  X(31,659)},

  "stswx",        { RS, RA, RB }        ,{PPCCOM, X(31,661)},
  "stsx",         { RS, RA, RB }        ,{PWRCOM, X(31,661)},

  "stwbrx",       { RS, RA, RB }        ,{PPCCOM, X(31,662)},
  "stbrx",        { RS, RA, RB }        ,{PWRCOM, X(31,662)},

  "stfsx",        { FRS, RA, RB }       ,{COM,    X(31,663)},

  "srq",          { RA, RS, RB }        ,{M601,   XRC(31,664,0)},
  "srq.",         { RA, RS, RB }        ,{M601,   XRC(31,664,1)},

  "sre",          { RA, RS, RB }        ,{M601,   XRC(31,665,0)},
  "sre.",         { RA, RS, RB }        ,{M601,   XRC(31,665,1)},

  "stfsux",       { FRS, RAS, RB }      ,{COM,    X(31,695)},

  "sriq",         { RA, RS, SH }        ,{M601,   XRC(31,696,0)},
  "sriq.",        { RA, RS, SH }        ,{M601,   XRC(31,696,1)},

  "stswi",        { RS, RA, NB }        ,{PPCCOM, X(31,725)},
  "stsi",         { RS, RA, NB }        ,{PWRCOM, X(31,725)},

  "stfdx",        { FRS, RA, RB }       ,{COM,    X(31,727)},

  "srlq",         { RA, RS, RB }        ,{M601,   XRC(31,728,0)},
  "srlq.",        { RA, RS, RB }        ,{M601,   XRC(31,728,1)},

  "sreq",         { RA, RS, RB }        ,{M601,   XRC(31,729,0)},
  "sreq.",        { RA, RS, RB }        ,{M601,   XRC(31,729,1)},

  "dcba",         { RA, RB }            ,{VL7450, X(31,758)},

  "stfdux",       { FRS, RAS, RB }      ,{COM,    X(31,759)},

  "srliq",        { RA, RS, SH }        ,{M601,   XRC(31,760,0)},
  "srliq.",       { RA, RS, SH }        ,{M601,   XRC(31,760,1)},

  "tlbivax",      { RA, RB }            ,{VLBE476,X(31,786)},

  "lhbrx",        { RT, RA, RB }        ,{COM,    X(31,790)},

  "sraw",         { RA, RS, RB }        ,{PPCCOM, XRC(31,792,0)},
  "sra",          { RA, RS, RB }        ,{PWRCOM, XRC(31,792,0)},
  "sraw.",        { RA, RS, RB }        ,{PPCCOM, XRC(31,792,1)},
  "sra.",         { RA, RS, RB }        ,{PWRCOM, XRC(31,792,1)},

  "srad",         { RA, RS, RB }        ,{PPC64,  XRC(31,794,0)},
  "srad.",        { RA, RS, RB }        ,{PPC64,  XRC(31,794,1)},

  "rac",          { RT, RA, RB }        ,{PWRCOM, X(31,818)},

  "dss",          { STRM, AT }          ,{AVEC,   X(31,822)},
  "dssall",       { 0 }                 ,{AVEC,   XDS(31,822,1)},

  "srawi",        { RA, RS, SH }        ,{PPCCOM, XRC(31,824,0)},
  "srai",         { RA, RS, SH }        ,{PWRCOM, XRC(31,824,0)},
  "srawi.",       { RA, RS, SH }        ,{PPCCOM, XRC(31,824,1)},
  "srai.",        { RA, RS, SH }        ,{PWRCOM, XRC(31,824,1)},

  "eieio",        { 0 }                 ,{PPC,    X(31,854)},
  "mbar",         { CT }                ,{VLBE476,X(31,854)},

  "tlbsx",        { RT, RA, RB }        ,{BE403,  XRC(31,914,0)},
  "tlbsx.",       { RT, RA, RB }        ,{BE403,  XRC(31,914,1)},

  "sthbrx",       { RS, RA, RB }        ,{COM,    X(31,918)},

  "sraq",         { RA, RS, RB }        ,{M601,   XRC(31,920,0)},
  "sraq.",        { RA, RS, RB }        ,{M601,   XRC(31,920,1)},

  "srea",         { RA, RS, RB }        ,{M601,   XRC(31,921,0)},
  "srea.",        { RA, RS, RB }        ,{M601,   XRC(31,921,1)},

  "extsh",        { RA, RS }            ,{PPCCOM, XRC(31,922,0)},
  "exts",         { RA, RS }            ,{PWRCOM, XRC(31,922,0)},
  "extsh.",       { RA, RS }            ,{PPCCOM, XRC(31,922,1)},
  "exts.",        { RA, RS }            ,{PWRCOM, XRC(31,922,1)},

  "tlbrehi",      { RT, RA }            ,{PPC403, XTLB(31,946,0)},
  "tlbrelo",      { RT, RA }            ,{PPC403, XTLB(31,946,1)},
  "tlbre",        { RSOPT, RAOPT, SHO } ,{BE403,  X(31,946)},

  "sraiq",        { RA, RS, SH }        ,{M601,   XRC(31,952,0)},
  "sraiq.",       { RA, RS, SH }        ,{M601,   XRC(31,952,1)},

  "extsb",        { RA, RS}             ,{PPC,    XRC(31,954,0)},
  "extsb.",       { RA, RS}             ,{PPC,    XRC(31,954,1)},

  "iccci",        { RA, RB }            ,{PPC43,  X(31,966)},

  "tlbld",        { RB }                ,{BE403,  X(31,978)},
  "tlbwehi",      { RT, RA }            ,{PPC403, XTLB(31,978,0)},
  "tlbwelo",      { RT, RA }            ,{PPC403, XTLB(31,978,1)},
  "tlbwe",        { RSOPT, RAOPT, SHO } ,{BE403, X(31,978)},

  "icbi",         { RA, RB }            ,{PPC,    X(31,982)},

  "stfiwx",       { FRS, RA, RB }       ,{PPC,    X(31,983)},

  "extsw",        { RA, RS }            ,{PPC,    XRC(31,986,0)},
  "extsw.",       { RA, RS }            ,{PPC,    XRC(31,986,1)},

  "icread",       { RA, RB }            ,{VL4376, X(31,998)},

  "tlbli",        { RB }                ,{PPC,    X(31,1010)},

  "dcbz",         { RA, RB }            ,{PPC,    X(31,1014)},
  "dclz",         { RA, RB }            ,{PPC,    X(31,1014)},

  "lvebx",        { VD, RA, RB }        ,{AVEC,   X(31,   7)},
  "lvehx",        { VD, RA, RB }        ,{AVEC,   X(31,  39)},
  "lvewx",        { VD, RA, RB }        ,{AVEC,   X(31,  71)},
  "lvsl",         { VD, RA, RB }        ,{AVEC,   X(31,   6)},
  "lvsr",         { VD, RA, RB }        ,{AVEC,   X(31,  38)},
  "lvx",          { VD, RA, RB }        ,{AVEC,   X(31, 103)},
  "lvxl",         { VD, RA, RB }        ,{AVEC,   X(31, 359)},
  "stvebx",       { VS, RA, RB }        ,{AVEC,   X(31, 135)},
  "stvehx",       { VS, RA, RB }        ,{AVEC,   X(31, 167)},
  "stvewx",       { VS, RA, RB }        ,{AVEC,   X(31, 199)},
  "stvx",         { VS, RA, RB }        ,{AVEC,   X(31, 231)},
  "stvxl",        { VS, RA, RB }        ,{AVEC,   X(31, 487)},

  "lwz",          { RT, D, RA }         ,{PPCCOM, OP(32)},
  "l",            { RT, D, RA }         ,{PWRCOM, OP(32)},

  "lwzu",         { RT, D, RAL }        ,{PPCCOM, OP(33)},
  "lu",           { RT, D, RA }         ,{PWRCOM, OP(33)},

  "lbz",          { RT, D, RA }         ,{COM,    OP(34)},

  "lbzu",         { RT, D, RAL }        ,{COM,    OP(35)},

  "stw",          { RS, D, RA }         ,{PPCCOM, OP(36)},
  "st",           { RS, D, RA }         ,{PWRCOM, OP(36)},

  "stwu",         { RS, D, RAS }        ,{PPCCOM, OP(37)},
  "stu",          { RS, D, RA }         ,{PWRCOM, OP(37)},

  "stb",          { RS, D, RA }         ,{COM,    OP(38)},

  "stbu",         { RS, D, RAS }        ,{COM,    OP(39)},

  "lhz",          { RT, D, RA }         ,{COM,    OP(40)},

  "lhzu",         { RT, D, RAL }        ,{COM,    OP(41)},

  "lha",          { RT, D, RA }         ,{COM,    OP(42)},

  "lhau",         { RT, D, RAL }        ,{COM,    OP(43)},

  "sth",          { RS, D, RA }         ,{COM,    OP(44)},

  "sthu",         { RS, D, RAS }        ,{COM,    OP(45)},

  "lmw",          { RT, D, RAM }        ,{PPCCOM, OP(46)},
  "lm",           { RT, D, RA }         ,{PWRCOM, OP(46)},

  "stmw",         { RS, D, RA }         ,{PPCCOM, OP(47)},
  "stm",          { RS, D, RA }         ,{PWRCOM, OP(47)},

  "lfs",          { FRT, D, RA }        ,{COM,    OP(48)},

  "lfsu",         { FRT, D, RAS }       ,{COM,    OP(49)},

  "lfd",          { FRT, D, RA }        ,{COM,    OP(50)},

  "lfdu",         { FRT, D, RAS }       ,{COM,    OP(51)},

  "stfs",         { FRS, D, RA }        ,{COM,    OP(52)},

  "stfsu",        { FRS, D, RAS }       ,{COM,    OP(53)},

  "stfd",         { FRS, D, RA }        ,{COM,    OP(54)},

  "stfdu",        { FRS, D, RAS }       ,{COM,    OP(55)},

  "lfq",          { FRT, D, RA }        ,{POWER2, OP(56)},

  "lfqu",         { FRT, D, RA }        ,{POWER2, OP(57)},

  "ld",           { RT, DS, RA }        ,{PPC64,  DSO(58,0)},

  "ldu",          { RT, DS, RAL }       ,{PPC64,  DSO(58,1)},

  "lwa",          { RT, DS, RA }        ,{PPC64,  DSO(58,2)},

  "fdivs",        { FRT, FRA, FRB }     ,{PPC,    A(59,18,0)},
  "fdivs.",       { FRT, FRA, FRB }     ,{PPC,    A(59,18,1)},

  "fsubs",        { FRT, FRA, FRB }     ,{PPC,    A(59,20,0)},
  "fsubs.",       { FRT, FRA, FRB }     ,{PPC,    A(59,20,1)},

  "fadds",        { FRT, FRA, FRB }     ,{PPC,    A(59,21,0)},
  "fadds.",       { FRT, FRA, FRB }     ,{PPC,    A(59,21,1)},

  "fsqrts",       { FRT, FRB }          ,{PPC,    A(59,22,0)},
  "fsqrts.",      { FRT, FRB }          ,{PPC,    A(59,22,1)},

  "fres",         { FRT, FRB }          ,{PPC,    A(59,24,0)},
  "fres.",        { FRT, FRB }          ,{PPC,    A(59,24,1)},

  "fmuls",        { FRT, FRA, FRC }     ,{PPC,    A(59,25,0)},
  "fmuls.",       { FRT, FRA, FRC }     ,{PPC,    A(59,25,1)},

  "fmsubs",       { FRT,FRA,FRC,FRB }   ,{PPC,    A(59,28,0)},
  "fmsubs.",      { FRT,FRA,FRC,FRB }   ,{PPC,    A(59,28,1)},

  "fmadds",       { FRT,FRA,FRC,FRB }   ,{PPC,    A(59,29,0)},
  "fmadds.",      { FRT,FRA,FRC,FRB }   ,{PPC,    A(59,29,1)},

  "fnmsubs",      { FRT,FRA,FRC,FRB }   ,{PPC,    A(59,30,0)},
  "fnmsubs.",     { FRT,FRA,FRC,FRB }   ,{PPC,    A(59,30,1)},

  "fnmadds",      { FRT,FRA,FRC,FRB }   ,{PPC,    A(59,31,0)},
  "fnmadds.",     { FRT,FRA,FRC,FRB }   ,{PPC,    A(59,31,1)},

  "stfq",         { FRS, D, RA }        ,{POWER2, OP(60)},

  "stfqu",        { FRS, D, RA }        ,{POWER2, OP(61)},

  "std",          { RS, DS, RA }        ,{PPC64,  DSO(62,0)},

  "stdu",         { RS, DS, RAS }       ,{PPC64,  DSO(62,1)},

  "fcmpu",        { BF, FRA, FRB }      ,{COM,    X(63,0)},

  "frsp",         { FRT, FRB }          ,{COM,    XRC(63,12,0)},
  "frsp.",        { FRT, FRB }          ,{COM,    XRC(63,12,1)},

  "fctiw",        { FRT, FRB }          ,{PPCCOM, XRC(63,14,0)},
  "fcir",         { FRT, FRB }          ,{POWER2, XRC(63,14,0)},
  "fctiw.",       { FRT, FRB }          ,{PPCCOM, XRC(63,14,1)},
  "fcir.",        { FRT, FRB }          ,{POWER2, XRC(63,14,1)},

  "fctiwz",       { FRT, FRB }          ,{PPCCOM, XRC(63,15,0)},
  "fcirz",        { FRT, FRB }          ,{POWER2, XRC(63,15,0)},
  "fctiwz.",      { FRT, FRB }          ,{PPCCOM, XRC(63,15,1)},
  "fcirz.",       { FRT, FRB }          ,{POWER2, XRC(63,15,1)},

  "fdiv",         { FRT, FRA, FRB }     ,{PPCCOM, A(63,18,0)},
  "fd",           { FRT, FRA, FRB }     ,{PWRCOM, A(63,18,0)},
  "fdiv.",        { FRT, FRA, FRB }     ,{PPCCOM, A(63,18,1)},
  "fd.",          { FRT, FRA, FRB }     ,{PWRCOM, A(63,18,1)},

  "fsub",         { FRT, FRA, FRB }     ,{PPCCOM, A(63,20,0)},
  "fs",           { FRT, FRA, FRB }     ,{PWRCOM, A(63,20,0)},
  "fsub.",        { FRT, FRA, FRB }     ,{PPCCOM, A(63,20,1)},
  "fs.",          { FRT, FRA, FRB }     ,{PWRCOM, A(63,20,1)},

  "fadd",         { FRT, FRA, FRB }     ,{PPCCOM, A(63,21,0)},
  "fa",           { FRT, FRA, FRB }     ,{PWRCOM, A(63,21,0)},
  "fadd.",        { FRT, FRA, FRB }     ,{PPCCOM, A(63,21,1)},
  "fa.",          { FRT, FRA, FRB }     ,{PWRCOM, A(63,21,1)},

  "fsqrt",        { FRT, FRB }          ,{PPCPWR2,A(63,22,0)},
  "fsqrt.",       { FRT, FRB }          ,{PPCPWR2,A(63,22,1)},

  "fsel",         { FRT,FRA,FRC,FRB }   ,{PPC,    A(63,23,0)},
  "fsel.",        { FRT,FRA,FRC,FRB }   ,{PPC,    A(63,23,1)},

  "fmul",         { FRT, FRA, FRC }     ,{PPCCOM, A(63,25,0)},
  "fm",           { FRT, FRA, FRC }     ,{PWRCOM, A(63,25,0)},
  "fmul.",        { FRT, FRA, FRC }     ,{PPCCOM, A(63,25,1)},
  "fm.",          { FRT, FRA, FRC }     ,{PWRCOM, A(63,25,1)},

  "frsqrte",      { FRT, FRB }          ,{PPC,    A(63,26,0)},
  "frsqrte.",     { FRT, FRB }          ,{PPC,    A(63,26,1)},

  "fmsub",        { FRT,FRA,FRC,FRB }   ,{PPCCOM, A(63,28,0)},
  "fms",          { FRT,FRA,FRC,FRB }   ,{PWRCOM, A(63,28,0)},
  "fmsub.",       { FRT,FRA,FRC,FRB }   ,{PPCCOM, A(63,28,1)},
  "fms.",         { FRT,FRA,FRC,FRB }   ,{PWRCOM, A(63,28,1)},

  "fmadd",        { FRT,FRA,FRC,FRB }   ,{PPCCOM, A(63,29,0)},
  "fma",          { FRT,FRA,FRC,FRB }   ,{PWRCOM, A(63,29,0)},
  "fmadd.",       { FRT,FRA,FRC,FRB }   ,{PPCCOM, A(63,29,1)},
  "fma.",         { FRT,FRA,FRC,FRB }   ,{PWRCOM, A(63,29,1)},

  "fnmsub",       { FRT,FRA,FRC,FRB }   ,{PPCCOM, A(63,30,0)},
  "fnms",         { FRT,FRA,FRC,FRB }   ,{PWRCOM, A(63,30,0)},
  "fnmsub.",      { FRT,FRA,FRC,FRB }   ,{PPCCOM, A(63,30,1)},
  "fnms.",        { FRT,FRA,FRC,FRB }   ,{PWRCOM, A(63,30,1)},

  "fnmadd",       { FRT,FRA,FRC,FRB }   ,{PPCCOM, A(63,31,0)},
  "fnma",         { FRT,FRA,FRC,FRB }   ,{PWRCOM, A(63,31,0)},
  "fnmadd.",      { FRT,FRA,FRC,FRB }   ,{PPCCOM, A(63,31,1)},
  "fnma.",        { FRT,FRA,FRC,FRB }   ,{PWRCOM, A(63,31,1)},

  "fcmpo",        { BF, FRA, FRB }      ,{COM,    X(63,32)},

  "mtfsb1",       { BT }                ,{COM,    XRC(63,38,0)},
  "mtfsb1.",      { BT }                ,{COM,    XRC(63,38,1)},

  "fneg",         { FRT, FRB }          ,{COM,    XRC(63,40,0)},
  "fneg.",        { FRT, FRB }          ,{COM,    XRC(63,40,1)},

  "mcrfs",        { BF, BFA }           ,{COM,    X(63,64)},

  "mtfsb0",       { BT }                ,{COM,    XRC(63,70,0)},
  "mtfsb0.",      { BT }                ,{COM,    XRC(63,70,1)},

  "fmr",          { FRT, FRB }          ,{COM,    XRC(63,72,0)},
  "fmr.",         { FRT, FRB }          ,{COM,    XRC(63,72,1)},

  "mtfsfi",       { BF, U }             ,{COM,    XRC(63,134,0)},
  "mtfsfi.",      { BF, U }             ,{COM,    XRC(63,134,1)},

  "fnabs",        { FRT, FRB }          ,{COM,    XRC(63,136,0)},
  "fnabs.",       { FRT, FRB }          ,{COM,    XRC(63,136,1)},

  "fabs",         { FRT, FRB }          ,{COM,    XRC(63,264,0)},
  "fabs.",        { FRT, FRB }          ,{COM,    XRC(63,264,1)},

  "mffs",         { FRT }               ,{COM,    XRC(63,583,0)},
  "mffs.",        { FRT }               ,{COM,    XRC(63,583,1)},

  "mtfsf",        { FLM, FRB }          ,{COM,    XFL(63,711,0)},
  "mtfsf.",       { FLM, FRB }          ,{COM,    XFL(63,711,1)},

  "fctid",        { FRT, FRB }          ,{PPC64,  XRC(63,814,0)},
  "fctid.",       { FRT, FRB }          ,{PPC64,  XRC(63,814,1)},

  "fctidz",       { FRT, FRB }          ,{PPC64,  XRC(63,815,0)},
  "fctidz.",      { FRT, FRB }          ,{PPC64,  XRC(63,815,1)},

  "fcfid",        { FRT, FRB }          ,{PPC64,  XRC(63,846,0)},
  "fcfid.",       { FRT, FRB }          ,{PPC64,  XRC(63,846,1)},
